Inventor · disambiguated record
Timothy A. Gosselin
Also filed as: GOSSELIN TIMOTHY · GOSSELIN TIMOTHY A
11 granted patents·10 pending applications·112 citations·filing 2002–2024
89Inventor score
Top patents by PatentIndex Score
21 records- 0194US11075166B2Microelectronic structures having multiple microelectronic devices connected with a microelectronic bridge embedded in a microelectronic substrateINTEL CORP·Filed 2020·Granted Jul 27, 2021·3 cites·18 claims
- 0293US10418329B2Microelectronic structures having multiple microelectronic devices connected with a microelectronic bridge embedded in a microelectronic substrateINTEL CORP·Filed 2015·Granted Sep 17, 2019·11 cites·23 claims
- 0393US6805974B2Lead-free tin-silver-copper alloy solder compositionIBM·Filed 2002·Granted Oct 19, 2004·59 cites·73 claims
- 0484US10845552B2Coreless package architecture for multi-chip opto-electronicsINTEL CORP·Filed 2017·Granted Nov 24, 2020·4 cites·25 claims
- 0582US7101782B2Method of making a circuitized substrateIBM·Filed 2006·Granted Sep 5, 2006·10 cites·12 claims
- 0674US7740713B2Flux composition and techniques for use thereofIBM·Filed 2004·Granted Jun 22, 2010·17 cites·30 claims
- 0773US2025118698A1Microelectronic assemblies including solder and non-solder interconnectsINTEL CORP·Filed 2024·Application pending·0 cites
- 0872US11676900B2Electronic assembly that includes a bridgeINTEL CORP·Filed 2015·Granted Jun 13, 2023·2 cites·12 claims
- 0959US10790231B2Microelectronic structures having multiple microelectronic devices connected with a microelectronic bridge embedded in a microelectronic substrateINTEL CORP·Filed 2019·Granted Sep 29, 2020·0 cites·22 claims
- 1059US2023088170A1Microelectronic assemblies including solder and non-solder interconnectsINTEL CORP·Filed 2021·Application pending·0 cites
- 1158US2025218998A1Low temperature solder interconnect for package pitch scalingINTEL CORP·Filed 2023·Application pending·0 cites
- 1255US2025106983A1Stiffener architectures for glass edge protectionINTEL CORP·Filed 2023·Application pending·0 cites
- 1352US7037819B2Method of making a circuitized substrateIBM·Filed 2004·Granted May 2, 2006·3 cites·14 claims
- 1452US6818988B2Method of making a circuitized substrate and the resultant circuitized substrateIBM·Filed 2002·Granted Nov 16, 2004·3 cites·12 claims
- 1552US2024395567A1Selective underfilling using pre-applied thermoset adhesiveINTEL CORP·Filed 2023·Application pending·0 cites
- 1651US2024222288A1Socket interface frames for devices with improved-performance substratesINTEL CORP·Filed 2022·Application pending·0 cites
- 1750US2006242825A1Method of making a circuitized substrateIBM·Filed 2006·Application pending·0 cites
- 1850US2024321807A1Barrier dispensing combined with non-conductive paste to enable packages with restricted underfill areasINTEL CORP·Filed 2023·Application pending·0 cites
- 1950US2023086691A1Microelectronic assemblies including bridgesINTEL CORP·Filed 2021·Application pending·0 cites
- 2042US2023078395A1Devices and methods to minimize die shift in embedded heterogeneous architecturesINTEL CORP·Filed 2021·Application pending·0 cites
- 2135US9786517B2Ablation method and recipe for wafer level underfill material patterning and removalDIAS RAJENDRA C·Filed 2013·Granted Oct 10, 2017·0 cites·13 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →