Inventor · disambiguated record
Timothy G. Mester
Also filed as: MESTER TIMOTHY G
11 granted patents·2 pending applications·27 citations·filing 2003–2019
83Inventor score
Top patents by PatentIndex Score
13 records- 0170US9584170B2Broadband superhetrodyne receiver with agile intermediate frequency for interference mitigationFREEWAVE TECH INC·Filed 2015·Granted Feb 28, 2017·2 cites·14 claims
- 0269US6819133B1System and method for protecting configuration data for a programmable execution unitADTRAN INC·Filed 2003·Granted Nov 16, 2004·18 cites·21 claims
- 0361US9819446B2Dynamic and flexible channel selection in a wireless communication systemFREEWAVE TECH INC·Filed 2015·Granted Nov 14, 2017·1 cites·16 claims
- 0460US9787354B2Pre-distortion of receive signal for interference mitigation in broadband transceiversFREEWAVE TECH INC·Filed 2015·Granted Oct 10, 2017·1 cites·29 claims
- 0554US11765086B2Wireless traffic optimization for ISM radiosFREEWAVE TECH INC·Filed 2019·Granted Sep 19, 2023·0 cites·19 claims
- 0653US7212598B2Data buffer-controlled digital clock regeneratorADTRAN INC·Filed 2003·Granted May 1, 2007·5 cites·14 claims
- 0749US10425334B2Wireless traffic optimization for ISM radiosFREEWAVE TECH INC·Filed 2016·Granted Sep 24, 2019·0 cites·19 claims
- 0845US10374729B2Antenna alignment tool and methodFREEWAVE TECH INC·Filed 2017·Granted Aug 6, 2019·0 cites·31 claims
- 0944US7305042B2T1 radio having coding gain adjustable for number of channelsADTRAN INC·Filed 2004·Granted Dec 4, 2007·0 cites·4 claims
- 1040US2005250457A1Radio diagnostic tool combining signal quality and signal strength measurementADTRAN INC·Filed 2004·Application pending·0 cites
- 1138US10033511B2Synchronization of co-located radios in a dynamic time division duplex system for interference mitigationFREEWAVE TECH INC·Filed 2015·Granted Jul 24, 2018·0 cites·11 claims
- 1234US10149263B2Techniques for transmitting/receiving portions of received signal to identify preamble portion and to determine signal-distorting characteristicsFREEWAVE TECH INC·Filed 2015·Granted Dec 4, 2018·0 cites·14 claims
- 1330US2005013396A1Digital clock recovery circuit employing fixed clock oscillator driving fractional delay lineADTRAN INC·Filed 2003·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →