Inventor · disambiguated record
Tim Tuan
Also filed as: TUAN TIM
48 granted patents·6 pending applications·801 citations·filing 2003–2025
98Inventor score
Top patents by PatentIndex Score
54 records- 0198US11288222B1Multi-die integrated circuit with data processing engine arrayXILINX INC·Filed 2020·Granted Mar 29, 2022·8 cites·19 claims
- 0298US7973556B1System and method for using reconfiguration ports for power management in integrated circuitsXILINX INC·Filed 2009·Granted Jul 5, 2011·90 cites·20 claims
- 0397US7764081B1Programmable logic device (PLD) with memory refresh based on single event upset (SEU) occurrence to maintain soft error immunityXILINX INC·Filed 2005·Granted Jul 27, 2010·51 cites·18 claims
- 0497US7098689B1Disabling unused/inactive resources in programmable logic devices for static power reductionXILINX INC·Filed 2003·Granted Aug 29, 2006·79 cites·9 claims
- 0596US11693808B2Multi-die integrated circuit with data processing engine arrayXILINX INC·Filed 2022·Granted Jul 4, 2023·3 cites·20 claims
- 0696US11336287B1Data processing engine array architecture with memory tilesXILINX INC·Filed 2021·Granted May 17, 2022·26 cites·20 claims
- 0796US10866753B2Data processing engine arrangement in a deviceXILINX INC·Filed 2018·Granted Dec 15, 2020·15 cites·10 claims
- 0896US7620926B1Methods and structures for flexible power management in integrated circuitsXILINX INC·Filed 2007·Granted Nov 17, 2009·39 cites·10 claims
- 0996US7498835B1Implementation of low power standby modes for integrated circuitsXILINX INC·Filed 2005·Granted Mar 3, 2009·47 cites·19 claims
- 1095US12001367B2Multi-die integrated circuit with data processing engine arrayXILINX INC·Filed 2023·Granted Jun 4, 2024·2 cites·20 claims
- 1195US11669464B1Multi-addressing mode for DMA and non-sequential read and write patternsXILINX INC·Filed 2020·Granted Jun 6, 2023·9 cites·20 claims
- 1295US11520717B1Memory tiles in data processing engine arrayXILINX INC·Filed 2021·Granted Dec 6, 2022·11 cites·20 claims
- 1395US8159263B1Programmable integrated circuit with voltage domainsTUAN TIM·Filed 2010·Granted Apr 17, 2012·21 cites·20 claims
- 1495US7581124B1Method and mechanism for controlling power consumption of an integrated circuitXILINX INC·Filed 2006·Granted Aug 25, 2009·50 cites·18 claims
- 1595US7477073B1Structures and methods for heterogeneous low power programmable logic deviceXILINX INC·Filed 2006·Granted Jan 13, 2009·35 cites·17 claims
- 1694US11323391B1Multi-port stream switch for stream interconnect networkXILINX INC·Filed 2020·Granted May 3, 2022·6 cites·20 claims
- 1794US7498836B1Programmable low power modes for embedded memory blocksXILINX INC·Filed 2006·Granted Mar 3, 2009·38 cites·19 claims
- 1891US10635622B2System-on-chip interface architectureXILINX INC·Filed 2018·Granted Apr 28, 2020·10 cites·8 claims
- 1989US11848670B2Multiple partitions in a data processing arrayXILINX INC·Filed 2022·Granted Dec 19, 2023·2 cites·10 claims
- 2089US7562332B1Disabling unused/inactive resources in programmable logic devices for static power reductionXILINX INC·Filed 2006·Granted Jul 14, 2009·13 cites·20 claims
- 2188US7992020B1Power management with packaged multi-die integrated circuitXILINX INC·Filed 2008·Granted Aug 2, 2011·26 cites·20 claims
- 2286US7504854B1Regulating unused/inactive resources in programmable logic devices for static power reductionXILINX INC·Filed 2004·Granted Mar 17, 2009·29 cites·18 claims
- 2386US7417454B1Low-swing interconnections for field programmable gate arraysXILINX INC·Filed 2005·Granted Aug 26, 2008·15 cites·16 claims
- 2484US11386020B1Programmable device having a data processing engine (DPE) arrayXILINX INC·Filed 2020·Granted Jul 12, 2022·2 cites·21 claims
- 2584US8130027B1Apparatus and method for the detection and compensation of integrated circuit performance variationTUAN TIM·Filed 2009·Granted Mar 6, 2012·13 cites·13 claims
- 2683US7545177B1Method and apparatus for leakage current reductionXILINX INC·Filed 2007·Granted Jun 9, 2009·12 cites·18 claims
- 2783US7490302B1Power gating various number of resources based on utilization levelsXILINX INC·Filed 2005·Granted Feb 10, 2009·17 cites·20 claims
- 2883US6950998B1Place-and-route with power analysisXILINX INC·Filed 2003·Granted Sep 27, 2005·35 cites·17 claims
- 2982US10747531B1Core for a data processing engine in an integrated circuitXILINX INC·Filed 2018·Granted Aug 18, 2020·3 cites·20 claims
- 3082US9355690B1Time-multiplexed, asynchronous deviceTUAN TIM·Filed 2011·Granted May 31, 2016·8 cites·20 claims
- 3182US7810058B1Early power estimator for integrated circuitsXILINX INC·Filed 2005·Granted Oct 5, 2010·13 cites·24 claims
- 3282US2025343549A1Multiple partitions in a data processing arrayXILINX INC·Filed 2025·Application pending·0 cites
- 3381US9348959B1Optimizing supply voltage and threshold voltageTUAN TIM·Filed 2012·Granted May 24, 2016·6 cites·18 claims
- 3477US11972132B2Data processing engine arrangement in a deviceXILINX INC·Filed 2022·Granted Apr 30, 2024·0 cites·19 claims
- 3577US8099691B1Disabling unused/inactive resources in an integrated circuit for static power reductionTUAN TIM·Filed 2009·Granted Jan 17, 2012·6 cites·20 claims
- 3676US11443091B1Data processing engines with cascade connected coresXILINX INC·Filed 2020·Granted Sep 13, 2022·1 cites·20 claims
- 3775US12401364B2Multiple partitions in a data processing arrayXILINX INC·Filed 2023·Granted Aug 26, 2025·0 cites·11 claims
- 3875US7549139B1Tuning programmable logic devices for low-power design implementationXILINX INC·Filed 2004·Granted Jun 16, 2009·18 cites·19 claims
- 3973US7253661B1Method and apparatus for a configurable latchXILINX INC·Filed 2005·Granted Aug 7, 2007·7 cites·18 claims
- 4069US9015023B2Device specific configuration of operating voltageTUAN TIM·Filed 2010·Granted Apr 21, 2015·3 cites·13 claims
- 4169US8146045B1High-level circuit architecture optimizerTUAN TIM·Filed 2008·Granted Mar 27, 2012·4 cites·20 claims
- 4267US7243312B1Method and apparatus for power optimization during an integrated circuit design processXILINX INC·Filed 2003·Granted Jul 10, 2007·12 cites·18 claims
- 4366US8155907B1Methods of enabling functions of a design to be implemented in an integrated circuit device and a computer program productLESEA AUSTIN H·Filed 2009·Granted Apr 10, 2012·3 cites·20 claims
- 4464US8443344B1Methods for identifying gating opportunities from a high-level language program and generating a hardware definitionSUNDARARAJAN PRASANNA·Filed 2008·Granted May 14, 2013·3 cites·14 claims
- 4559US8411527B1Multiple sleep mode memory deviceTUAN TIM·Filed 2011·Granted Apr 2, 2013·2 cites·20 claims
- 4657US2025370949A1Decoupling processing and interface clocks in an ipuXILINX INC·Filed 2024·Application pending·0 cites
- 4755US7212462B1Structure and method for suppressing sub-threshold leakage in integrated circuitsXILINX INC·Filed 2003·Granted May 1, 2007·8 cites·18 claims
- 4852US2025208907A1Controller for an array of data processing enginesXILINX INC·Filed 2023·Application pending·0 cites
- 4952US2025209036A1Integrating an ai accelerator with a cpu on a socXILINX INC·Filed 2023·Application pending·0 cites
- 5052US2025208682A1Power domains in a system on a chipXILINX INC·Filed 2023·Application pending·0 cites
Showing the top 50 of 54 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →