Inventor · disambiguated record
Tingjun Wen
Also filed as: WEN TINGJUN
9 granted patents·53 citations·filing 2006–2022
85Inventor score
Top patents by PatentIndex Score
9 records- 0195US10848164B1Apparatus and methods for digital fractional phase locked loop with a current mode low pass filterCIENA CORP·Filed 2020·Granted Nov 24, 2020·10 cites·17 claims
- 0294US10979059B1Successive approximation register analog to digital converter based phase-locked loop with programmable rangeCIENA CORP·Filed 2020·Granted Apr 13, 2021·12 cites·20 claims
- 0382US7355890B1Content addressable memory (CAM) devices having NAND-type compare circuitsINTEGRATED DEVICE TECH·Filed 2006·Granted Apr 8, 2008·19 cites·8 claims
- 0466US7298636B1Packet processors having multi-functional range match cells thereinINTEGRATED DEVICE TECH·Filed 2006·Granted Nov 20, 2007·7 cites·9 claims
- 0561US12034460B2Apparatus and method for Sigma-Delta modulator quantization noise cancellationCIENA CORP·Filed 2022·Granted Jul 9, 2024·0 cites·16 claims
- 0657US7825777B1Packet processors having comparators therein that determine non-strict inequalities between applied operandsINTEGRATED DEVICE TECH·Filed 2006·Granted Nov 2, 2010·2 cites·10 claims
- 0756US11218155B2Apparatus and methods for digital fractional phase locked loop with a current mode low pass filterCIENA CORP·Filed 2020·Granted Jan 4, 2022·0 cites·17 claims
- 0850US7822916B1Integrated circuit search engine devices having priority sequencer circuits therein that sequentially encode multiple match signalsNETLOGIC MICROSYSTEMS INC·Filed 2006·Granted Oct 26, 2010·3 cites·13 claims
- 0937US11804847B2Fractional frequency synthesis by sigma-delta modulating frequency of a reference clockCIENA CORP·Filed 2018·Granted Oct 31, 2023·0 cites·16 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →