Inventor · disambiguated record
Tsun-Lung Alex Cheng
Also filed as: CHENG TSUN LUNG · CHENG TSUN-LUNG ALEX
3 granted patents·100 citations·filing 1999–2000
74Inventor score
Top patents by PatentIndex Score
3 records- 0185US6242344B1Tri-layer resist method for dual damascene processINST OF MICROELECTRONICS·Filed 2000·Granted Jun 5, 2001·50 cites·28 claims
- 0276US6355399B1One step dual damascene patterning by gray tone maskCHARTERED SEMICONDUCTOR MFG·Filed 2000·Granted Mar 12, 2002·38 cites·10 claims
- 0342US6054361APreserving the zero mark for wafer alignmentCHARTERED SEMICONDUCTOR MFG·Filed 1999·Granted Apr 25, 2000·12 cites·18 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →