Inventor · disambiguated record
Tzung-Chin Chang
Also filed as: CHANG TZUNG-CHIN
28 granted patents·667 citations·filing 2001–2008
97Inventor score
Files withALTERA CORP28
Top patents by PatentIndex Score
28 records- 0198US6686769B1Programmable I/O element circuit for high speed logic devicesALTERA CORP·Filed 2001·Granted Feb 3, 2004·146 cites·29 claims
- 0297US7221193B1On-chip termination with calibrated driver strengthALTERA CORP·Filed 2005·Granted May 22, 2007·67 cites·24 claims
- 0394US7218155B1Techniques for controlling on-chip termination resistance using voltage range detectionALTERA CORP·Filed 2005·Granted May 15, 2007·32 cites·23 claims
- 0494US6911860B1On/off reference voltage switch for multiple I/O standardsALTERA CORP·Filed 2001·Granted Jun 28, 2005·59 cites·26 claims
- 0592US6825692B1Input buffer for multiple differential I/O standardsALTERA CORP·Filed 2002·Granted Nov 30, 2004·38 cites·25 claims
- 0691US7425844B1Input buffer for multiple differential I/O standardsALTERA CORP·Filed 2007·Granted Sep 16, 2008·14 cites·24 claims
- 0791US6870413B1Schmitt trigger circuit with adjustable trip point voltagesALTERA CORP·Filed 2001·Granted Mar 22, 2005·47 cites·25 claims
- 0890US7002384B1Loop circuitry with low-pass noise filterALTERA CORP·Filed 2004·Granted Feb 21, 2006·38 cites·36 claims
- 0990US6630844B1Supply voltage detection circuitALTERA CORP·Filed 2001·Granted Oct 7, 2003·33 cites·37 claims
- 1088US6970024B1Over-voltage protection of integrated circuit I/O pinsALTERA CORP·Filed 2004·Granted Nov 29, 2005·34 cites·21 claims
- 1185US7215143B1Input buffer for multiple differential I/O standardsALTERA CORP·Filed 2004·Granted May 8, 2007·20 cites·30 claims
- 1285US7205806B2Loop circuitry with low-pass noise filterALTERA CORP·Filed 2005·Granted Apr 17, 2007·12 cites·18 claims
- 1378US6549045B1Circuit for providing clock signals with low skewALTERA CORP·Filed 2002·Granted Apr 15, 2003·22 cites·31 claims
- 1477US7295040B1High speed IO buffer using auxiliary power supplyALTERA CORP·Filed 2006·Granted Nov 13, 2007·7 cites·20 claims
- 1577US7200769B1Self-compensating delay chain for multiple-date-rate interfacesALTERA CORP·Filed 2002·Granted Apr 3, 2007·17 cites·35 claims
- 1674US7088140B1High speed IO buffer using auxiliary power supplyALTERA CORP·Filed 2004·Granted Aug 8, 2006·14 cites·18 claims
- 1773US7098690B2Programmable I/O element circuit for high speed logic devicesALTERA CORP·Filed 2004·Granted Aug 29, 2006·2 cites·26 claims
- 1873US6853215B1Programmable I/O element circuit for high speed logic devicesALTERA CORP·Filed 2003·Granted Feb 8, 2005·2 cites·20 claims
- 1971US7212054B1DLL with adjustable phase shift using processed control signalALTERA CORP·Filed 2006·Granted May 1, 2007·6 cites·18 claims
- 2070US7119579B2Supply voltage detection circuitALTERA CORP·Filed 2004·Granted Oct 10, 2006·10 cites·14 claims
- 2169US6870400B1Supply voltage detection circuitALTERA CORP·Filed 2003·Granted Mar 22, 2005·11 cites·27 claims
- 2267US6731142B1Circuit for providing clock signals with low skewALTERA CORP·Filed 2003·Granted May 4, 2004·12 cites·11 claims
- 2362US6731137B1Programmable, staged, bus hold and weak pull-up for bi-directional I/OALTERA CORP·Filed 2002·Granted May 4, 2004·9 cites·23 claims
- 2460US6747903B1Configurable decoder for addressing a memoryALTERA CORP·Filed 2002·Granted Jun 8, 2004·8 cites·27 claims
- 2557US7725755B1Self-compensating delay chain for multiple-date-rate interfacesALTERA CORP·Filed 2007·Granted May 25, 2010·2 cites·32 claims
- 2651US7091760B1DLL with adjustable phase shift using processed control signalALTERA CORP·Filed 2004·Granted Aug 15, 2006·5 cites·31 claims
- 2745US7710149B1Input buffer for multiple differential I/O standardsALTERA CORP·Filed 2008·Granted May 4, 2010·0 cites·20 claims
- 2841US7308659B1Apparatus and method for RTL modeling of a registerALTERA CORP·Filed 2003·Granted Dec 11, 2007·0 cites·18 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →