Inventor · disambiguated record
Uday Shah
Also filed as: SHAH UDAY · SHAH UDAY N
134 granted patents·26 pending applications·3,513 citations·filing 2000–2019
99Inventor score
Top patents by PatentIndex Score
160 records- 0199US7825437B2Unity beta ratio tri-gate transistor static random access memory (SRAM)INTEL CORP·Filed 2007·Granted Nov 2, 2010·166 cites·17 claims
- 0299US7531437B2Method of forming metal gate electrodes using sacrificial gate electrode material and sacrificial gate dielectric materialINTEL CORP·Filed 2006·Granted May 12, 2009·195 cites·10 claims
- 0398US8283653B2Non-planar germanium quantum well devicesPILLARISETTY RAVI·Filed 2009·Granted Oct 9, 2012·47 cites·20 claims
- 0498US7898041B2Block contact architectures for nanoscale channel transistorsINTEL CORP·Filed 2007·Granted Mar 1, 2011·113 cites·20 claims
- 0598US7745270B2Tri-gate patterning using dual layer gate stackINTEL CORP·Filed 2007·Granted Jun 29, 2010·121 cites·20 claims
- 0698US7547637B2Methods for patterning a semiconductor filmINTEL CORP·Filed 2005·Granted Jun 16, 2009·52 cites·8 claims
- 0798US7479421B2Process for integrating planar and non-planar CMOS transistors on a bulk substrate and article made therebyINTEL CORP·Filed 2005·Granted Jan 20, 2009·105 cites·2 claims
- 0898US7407847B2Stacked multi-gate transistor design and method of fabricationINTEL CORP·Filed 2006·Granted Aug 5, 2008·99 cites·19 claims
- 0998US7326656B2Method of forming a metal oxide dielectricINTEL CORP·Filed 2006·Granted Feb 5, 2008·456 cites·19 claims
- 1098US7279375B2Block contact architectures for nanoscale channel transistorsINTEL CORP·Filed 2005·Granted Oct 9, 2007·93 cites·12 claims
- 1197US8890119B2Vertical nanowire transistor with axially engineered semiconductor and gate metallizationDOYLE BRIAN S·Filed 2012·Granted Nov 18, 2014·31 cites·18 claims
- 1297US8575596B2Non-planar germanium quantum well devicesPILLARISETTY RAVI·Filed 2012·Granted Nov 5, 2013·24 cites·14 claims
- 1397US7550333B2Nonplanar device with thinned lower body portion and method of fabricationINTEL CORP·Filed 2006·Granted Jun 23, 2009·50 cites·15 claims
- 1497US7355281B2Method for making semiconductor device having a high-k gate dielectric layer and a metal gate electrodeINTEL CORP·Filed 2006·Granted Apr 8, 2008·47 cites·12 claims
- 1597US7208361B2Replacement gate process for making a semiconductor device that includes a metal gate electrodeINTEL CORP·Filed 2004·Granted Apr 24, 2007·128 cites·20 claims
- 1696US9209290B2III-N material structure for gate-recessed transistorsINTEL CORP·Filed 2015·Granted Dec 8, 2015·11 cites·14 claims
- 1796US8071983B2Semiconductor device structures and methods of forming semiconductor structuresBRASK JUSTIN K·Filed 2009·Granted Dec 6, 2011·29 cites·20 claims
- 1896US7361958B2Nonplanar transistors with metal gate electrodesINTEL CORP·Filed 2004·Granted Apr 22, 2008·86 cites·13 claims
- 1996US7153784B2Method for making a semiconductor device having a high-k gate dielectric layer and a metal gate electrodeINTEL CORP·Filed 2004·Granted Dec 26, 2006·86 cites·48 claims
- 2095US10439134B2Techniques for forming non-planar resistive memory cellsINTEL CORP·Filed 2014·Granted Oct 8, 2019·12 cites·21 claims
- 2195US9741809B2Nonplanar device with thinned lower body portion and method of fabricationINTEL CORP·Filed 2015·Granted Aug 22, 2017·8 cites·13 claims
- 2295US9653680B2Techniques for filament localization, edge effect reduction, and forming/switching voltage reduction in RRAM devicesINTEL CORP·Filed 2015·Granted May 16, 2017·11 cites·6 claims
- 2395US9530878B2III-N material structure for gate-recessed transistorsINTEL CORP·Filed 2015·Granted Dec 27, 2016·8 cites·14 claims
- 2495US9306063B2Vertical transistor devices for embedded memory and logic technologiesDOYLE BRIAN S·Filed 2013·Granted Apr 5, 2016·20 cites·19 claims
- 2595US8796797B2Perpendicular spin transfer torque memory (STTM) device with enhanced stability and method to form sameDOYLE BRIAN S·Filed 2012·Granted Aug 5, 2014·17 cites·30 claims
- 2695US8502351B2Nonplanar device with thinned lower body portion and method of fabricationSHAH UDAY·Filed 2011·Granted Aug 6, 2013·17 cites·11 claims
- 2795US8193567B2Process for integrating planar and non-planar CMOS transistors on a bulk substrate and article made therebyKAVALIEROS JACK T·Filed 2008·Granted Jun 5, 2012·33 cites·4 claims
- 2895US7785958B2Method for making a semiconductor device having a high-k gate dielectric layer and a metal gate electrodeINTEL CORP·Filed 2008·Granted Aug 31, 2010·38 cites·3 claims
- 2995US7709312B2Methods for inducing strain in non-planar transistor structuresINTEL CORP·Filed 2006·Granted May 4, 2010·34 cites·12 claims
- 3095US7528025B2Nonplanar transistors with metal gate electrodesINTEL CORP·Filed 2007·Granted May 5, 2009·52 cites·7 claims
- 3195US7157378B2Method for making a semiconductor device having a high-k gate dielectric layer and a metal gate electrodeINTEL CORP·Filed 2004·Granted Jan 2, 2007·107 cites·20 claims
- 3295US7071064B2U-gate transistors and methods of fabricationINTEL CORP·Filed 2004·Granted Jul 4, 2006·96 cites·37 claims
- 3394US9755062B2III-N material structure for gate-recessed transistorsINTEL CORP·Filed 2016·Granted Sep 5, 2017·7 cites·20 claims
- 3494US8836056B2Perpendicular MTJ stacks with magnetic anisotropy enhancing layer and crystallization barrier layerOGUZ KAAN·Filed 2012·Granted Sep 16, 2014·18 cites·15 claims
- 3594US7220635B2Method for making a semiconductor device with a metal gate electrode that is formed on an annealed high-k gate dielectric layerINTEL CORP·Filed 2003·Granted May 22, 2007·78 cites·20 claims
- 3693US8987091B2III-N material structure for gate-recessed transistorsTHEN HAN WUI·Filed 2011·Granted Mar 24, 2015·11 cites·21 claims
- 3793US8264048B2Multi-gate device having a T-shaped gate structureRACHMADY WILLY·Filed 2008·Granted Sep 11, 2012·29 cites·12 claims
- 3893US7435683B2Apparatus and method for selectively recessing spacers on multi-gate devicesINTEL CORP·Filed 2006·Granted Oct 14, 2008·23 cites·13 claims
- 3993US7390709B2Method for making a semiconductor device having a high-k gate dielectric layer and a metal gate electrodeINTEL CORP·Filed 2004·Granted Jun 24, 2008·71 cites·15 claims
- 4093US7153734B2CMOS device with metal and silicide gate electrodes and a method for making itINTEL CORP·Filed 2003·Granted Dec 26, 2006·64 cites·4 claims
- 4193US7138323B2Planarizing a semiconductor structure to form replacement metal gatesINTEL CORP·Filed 2004·Granted Nov 21, 2006·51 cites·6 claims
- 4292US9293560B2Vertical nanowire transistor with axially engineered semiconductor and gate metallizationINTEL CORP·Filed 2014·Granted Mar 22, 2016·8 cites·8 claims
- 4392US8786040B2Perpendicular spin transfer torque memory (STTM) device having offset cells and method to form sameDOYLE BRIAN S·Filed 2012·Granted Jul 22, 2014·12 cites·28 claims
- 4492US8067818B2Nonplanar device with thinned lower body portion and method of fabricationSHAH UDAY·Filed 2010·Granted Nov 29, 2011·10 cites·10 claims
- 4592US7396711B2Method of fabricating a multi-cornered filmINTEL CORP·Filed 2005·Granted Jul 8, 2008·18 cites·21 claims
- 4692US7323423B2Forming high-k dielectric layers on smooth substratesINTEL CORP·Filed 2004·Granted Jan 29, 2008·49 cites·18 claims
- 4792US7176090B2Method for making a semiconductor device that includes a metal gate electrodeINTEL CORP·Filed 2004·Granted Feb 13, 2007·58 cites·20 claims
- 4891US9825095B2Hybrid phase field effect transistorINTEL CORP·Filed 2016·Granted Nov 21, 2017·6 cites·24 claims
- 4991US8933458B2Semiconductor device structures and methods of forming semiconductor structuresINTEL CORP·Filed 2013·Granted Jan 13, 2015·6 cites·9 claims
- 5091US7160767B2Method for making a semiconductor device that includes a metal gate electrodeINTEL CORP·Filed 2003·Granted Jan 9, 2007·54 cites·15 claims
Showing the top 50 of 160 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →