Inventor · disambiguated record
Varghese George
Also filed as: GEORGE VARGHESE
148 granted patents·44 pending applications·1,172 citations·filing 1999–2025
99Inventor score
Files withINTEL CORP167JAHAGIRDAR SANJEEV5FISCHER STEPHEN ANTHONY3ST MICROELECTRONICS INC3MAIYURAN SUBRAMANIAM2
Top patents by PatentIndex Score
192 records- 0198US12204487B2Graphics processor data access and sharingINTEL CORP·Filed 2024·Granted Jan 21, 2025·2 cites·18 claims
- 0298US12007935B2Graphics processors and graphics processing units having dot product accumulate instruction for hybrid floating point formatINTEL CORP·Filed 2020·Granted Jun 11, 2024·11 cites·25 claims
- 0398US11755501B2Efficient data sharing for graphics data processing operationsINTEL CORP·Filed 2021·Granted Sep 12, 2023·9 cites·20 claims
- 0498US11756150B2Disaggregation of system-on-chip (SOC) architectureINTEL CORP·Filed 2022·Granted Sep 12, 2023·5 cites·22 claims
- 0598US11709793B2Graphics processors and graphics processing units having dot product accumulate instruction for hybrid floating point formatINTEL CORP·Filed 2022·Granted Jul 25, 2023·9 cites·16 claims
- 0698US11676239B2Sparse optimizations for a matrix accelerator architectureINTEL CORP·Filed 2021·Granted Jun 13, 2023·10 cites·20 claims
- 0798US11620256B2Systems and methods for improving cache efficiency and utilizationINTEL CORP·Filed 2022·Granted Apr 4, 2023·36 cites·22 claims
- 0898US11410266B2Disaggregation of System-On-Chip (SOC) architectureINTEL CORP·Filed 2020·Granted Aug 9, 2022·6 cites·20 claims
- 0998US11361496B2Graphics processors and graphics processing units having dot product accumulate instruction for hybrid floating point formatINTEL CORP·Filed 2021·Granted Jun 14, 2022·41 cites·23 claims
- 1098US11113784B2Sparse optimizations for a matrix accelerator architectureINTEL CORP·Filed 2020·Granted Sep 7, 2021·46 cites·25 claims
- 1198US10803548B2Disaggregation of SOC architectureINTEL CORP·Filed 2019·Granted Oct 13, 2020·32 cites·20 claims
- 1297US12182035B2Systems and methods for cache optimizationINTEL CORP·Filed 2020·Granted Dec 31, 2024·6 cites·21 claims
- 1397US12182062B1Multi-tile memory managementINTEL CORP·Filed 2022·Granted Dec 31, 2024·2 cites·20 claims
- 1497US12079155B2Graphics processor operation scheduling for deterministic latencyINTEL CORP·Filed 2020·Granted Sep 3, 2024·6 cites·20 claims
- 1597US11954063B2Graphics processors and graphics processing units having dot product accumulate instruction for hybrid floating point formatINTEL CORP·Filed 2023·Granted Apr 9, 2024·2 cites·23 claims
- 1697US11899614B2Instruction based control of memory attributesINTEL CORP·Filed 2022·Granted Feb 13, 2024·2 cites·20 claims
- 1796US12124383B2Systems and methods for cache optimizationINTEL CORP·Filed 2022·Granted Oct 22, 2024·3 cites·24 claims
- 1896US12056059B2Systems and methods for cache optimizationINTEL CORP·Filed 2022·Granted Aug 6, 2024·3 cites·23 claims
- 1996US11842423B2Dot product operations on sparse matrix elementsINTEL CORP·Filed 2020·Granted Dec 12, 2023·4 cites·22 claims
- 2096US11204977B2Scalable sparse matrix multiply acceleration using systolic arrays with feedback inputsINTEL CORP·Filed 2020·Granted Dec 21, 2021·7 cites·20 claims
- 2195US12013808B2Multi-tile architecture for graphics operationsINTEL CORP·Filed 2020·Granted Jun 18, 2024·3 cites·17 claims
- 2295US11954062B2Dynamic memory reconfigurationINTEL CORP·Filed 2020·Granted Apr 9, 2024·3 cites·20 claims
- 2395US8806248B2Method, apparatus, and system for optimizing frequency and performance in a multidie microprocessorINTEL CORP·Filed 2013·Granted Aug 12, 2014·21 cites·20 claims
- 2495US6823418B2Virtual PCI device apparatus and methodINTEL CORP·Filed 2001·Granted Nov 23, 2004·116 cites·30 claims
- 2594US11636174B2Scalable sparse matrix multiply acceleration using systolic arrays with feedback inputsINTEL CORP·Filed 2021·Granted Apr 25, 2023·3 cites·20 claims
- 2694US7650518B2Method, apparatus, and system for increasing single core performance in a multi-core microprocessorINTEL CORP·Filed 2006·Granted Jan 19, 2010·41 cites·17 claims
- 2793US11409693B2Scalar core integrationINTEL CORP·Filed 2021·Granted Aug 9, 2022·2 cites·25 claims
- 2893US11016929B2Scalar core integrationINTEL CORP·Filed 2019·Granted May 25, 2021·7 cites·21 claims
- 2993US7149645B2Method and apparatus for accurate on-die temperature measurementINTEL CORP·Filed 2004·Granted Dec 12, 2006·86 cites·32 claims
- 3093US6785829B1Multiple operating frequencies in a processorINTEL CORP·Filed 2000·Granted Aug 31, 2004·92 cites·21 claims
- 3193US2025103548A1Systems and methods for improving cache efficiency and utilizationINTEL CORP·Filed 2024·Application pending·0 cites
- 3293US2025103547A1Systolic disaggregation within a matrix accelerator architectureINTEL CORP·Filed 2024·Application pending·0 cites
- 3393US2025173308A1Graphics processor data access and sharingINTEL CORP·Filed 2024·Application pending·0 cites
- 3492US12032496B2Efficient data sharing for graphics data processing operationsINTEL CORP·Filed 2023·Granted Jul 9, 2024·1 cites·20 claims
- 3592US2025103546A1Cache structure and utilizationINTEL CORP·Filed 2024·Application pending·0 cites
- 3692US2025004981A1Multi-tile memory managementINTEL CORP·Filed 2024·Application pending·0 cites
- 3791US12242846B2Supporting 8-bit floating point format operands in a computing architectureINTEL CORP·Filed 2024·Granted Mar 4, 2025·1 cites·20 claims
- 3891US11762804B2Scalar core integrationINTEL CORP·Filed 2022·Granted Sep 19, 2023·1 cites·24 claims
- 3991US2024403259A1Compression techniquesINTEL CORP·Filed 2024·Application pending·0 cites
- 4091US2025028675A1Graphics processor operation scheduling for deterministic latencyINTEL CORP·Filed 2024·Application pending·0 cites
- 4190US12386779B2Dynamic memory reconfigurationINTEL CORP·Filed 2024·Granted Aug 12, 2025·0 cites·20 claims
- 4290US12210477B2Systems and methods for improving cache efficiency and utilizationINTEL CORP·Filed 2020·Granted Jan 28, 2025·2 cites·20 claims
- 4390US12141094B2Systolic disaggregation within a matrix accelerator architectureINTEL CORP·Filed 2020·Granted Nov 12, 2024·2 cites·20 claims
- 4490US11995029B2Multi-tile memory management for detecting cross tile access providing multi-tile inference scaling and providing page migrationINTEL CORP·Filed 2020·Granted May 28, 2024·2 cites·17 claims
- 4590US11934342B2Assistance for hardware prefetch in cache accessINTEL CORP·Filed 2020·Granted Mar 19, 2024·3 cites·15 claims
- 4690US11386521B2Enabling product SKUS based on chiplet configurationsINTEL CORP·Filed 2021·Granted Jul 12, 2022·2 cites·20 claims
- 4790US8356197B2Method, apparatus, and system for optimizing frequency and performance in a multidie microprocessorINTEL CORP·Filed 2011·Granted Jan 15, 2013·11 cites·20 claims
- 4890US8032772B2Method, apparatus, and system for optimizing frequency and performance in a multi-die microprocessorINTEL CORP·Filed 2007·Granted Oct 4, 2011·15 cites·23 claims
- 4990US6704877B2Dynamically changing the performance of devices in a computer platformINTEL CORP·Filed 2000·Granted Mar 9, 2004·68 cites·21 claims
- 5090US2024411717A1Cache structure and utilizationINTEL CORP·Filed 2024·Application pending·0 cites
Showing the top 50 of 192 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →