Inventor · disambiguated record
Valery Y. Gorshtein
Also filed as: GORSHTEIN VALERY Y · GORSHTEIN VALERY YAKOVLEVICH
8 granted patents·1 pending application·363 citations·filing 1991–2006
90Inventor score
Technology areasG06F
Files withSUN MICROSYSTEMS INC4ELBRUS INTERNAT LTD2ELBRUS INTERNATIONAL1INST TOCHNOI MEK I VYCHISLITEL1SIVTSOV ALEXEY YURIEVICH1
Top patents by PatentIndex Score
9 records- 0183US6668316B1Method and apparatus for conflict-free execution of integer and floating-point operations with a common register fileELBRUS INTERNAT LTD·Filed 2000·Granted Dec 23, 2003·54 cites·12 claims
- 0277US5808926AFloating point addition methods and apparatusSUN MICROSYSTEMS INC·Filed 1996·Granted Sep 15, 1998·107 cites·26 claims
- 0375US5963461AMultiplication apparatus and methods which generate a shift amount by which the product of the significands is shifted for normalization or denormalizationSUN MICROSYSTEMS INC·Filed 1997·Granted Oct 5, 1999·62 cites·47 claims
- 0470US5923871AMultifunctional execution unit having independently operable adder and multiplierELBRUS INTERNATIONAL·Filed 1996·Granted Jul 13, 1999·74 cites·22 claims
- 0565US6751645B1Methods and apparatus for performing pipelined SRT divisionELBRUS INTERNAT LTD·Filed 2000·Granted Jun 15, 2004·21 cites·87 claims
- 0648US5844830AExecuting computer instrucrions by circuits having different latenciesSUN MICROSYSTEMS INC·Filed 1996·Granted Dec 1, 1998·19 cites·23 claims
- 0745US6099158AApparatus and methods for execution of computer instructionsSUN MICROSYSTEMS INC·Filed 1998·Granted Aug 8, 2000·16 cites·3 claims
- 0838US2008133895A1Floating Point AdditionSIVTSOV ALEXEY YURIEVICH·Filed 2006·Application pending·0 cites
- 0924US5418975AWide instruction word architecture central processorINST TOCHNOI MEK I VYCHISLITEL·Filed 1991·Granted May 23, 1995·10 cites·1 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →