Inventor · disambiguated record
Victor Maruri
Also filed as: MARURI VICTOR · MARURI VICTOR R · MARURI VICTOR RAÚL
17 granted patents·297 citations·filing 2000–2020
94Inventor score
Top patents by PatentIndex Score
17 records- 0198US6407576B1Interconnection and input/output resources for programmable logic integrated circuit devicesALTERA CORP·Filed 2000·Granted Jun 18, 2002·183 cites·41 claims
- 0289US7317332B2Interconnection and input/output resources for programmable logic integrated circuit devicesALTERA CORP·Filed 2005·Granted Jan 8, 2008·12 cites·21 claims
- 0387US7492188B2Interconnection and input/output resources for programmable logic integrated circuit devicesALTERA CORP·Filed 2007·Granted Feb 17, 2009·9 cites·22 claims
- 0483US6614261B2Interconnection and input/output resources for programable logic integrated circuit devicesALTERA CORP·Filed 2002·Granted Sep 2, 2003·15 cites·22 claims
- 0580US7262635B2Interconnection resources for programmable logic integrated circuit devicesALTERA CORP·Filed 2006·Granted Aug 28, 2007·6 cites·19 claims
- 0679US6989689B2Interconnection and input/output resources for programmable logic integrated circuit devicesALTERA CORP·Filed 2004·Granted Jan 24, 2006·13 cites·18 claims
- 0779US6727727B2Interconnection resources for programmable logic integrated circuit devicesALTERA CORP·Filed 2002·Granted Apr 27, 2004·13 cites·26 claims
- 0877US6366120B1Interconnection resources for programmable logic integrated circuit devicesALTERA CORP·Filed 2000·Granted Apr 2, 2002·12 cites·34 claims
- 0976US8581653B1Techniques for providing clock signals in clock networksMARURI VICTOR·Filed 2011·Granted Nov 12, 2013·6 cites·20 claims
- 1076US7123052B2Interconnection resources for programmable logic integrated circuit devicesALTERA CORP·Filed 2005·Granted Oct 17, 2006·5 cites·13 claims
- 1174US7839167B2Interconnection and input/output resources for programmable logic integrated circuit devicesALTERA CORP·Filed 2009·Granted Nov 23, 2010·4 cites·20 claims
- 1274US6897680B2Interconnection resources for programmable logic integrated circuit devicesALTERA CORP·Filed 2004·Granted May 24, 2005·10 cites·14 claims
- 1371US12322888B2Device under test board with offset connection to host boardINTEL CORP·Filed 2020·Granted Jun 3, 2025·1 cites·20 claims
- 1464US6894533B2Interconnection and input/output resources for programmable logic integrated circuit devicesALTERA CORP·Filed 2003·Granted May 17, 2005·6 cites·17 claims
- 1548US6525564B2Interconnection resources for programmable logic integrated circuit devicesALTERA CORP·Filed 2001·Granted Feb 25, 2003·2 cites·33 claims
- 1646US9515880B1Integrated circuits with clock selection circuitryVENKATA RAMANAND·Filed 2011·Granted Dec 6, 2016·0 cites·21 claims
- 1743US8739099B1Method and apparatus for determining clock uncertaintiesMARURI VICTOR R·Filed 2008·Granted May 27, 2014·0 cites·18 claims
Join the waitlist — get patent alerts
Get an alert when Victor Maruri files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →