Inventor · disambiguated record
Volker Mauer
Also filed as: MAUER VOLKER
37 granted patents·4 pending applications·446 citations·filing 2000–2025
97Inventor score
Top patents by PatentIndex Score
41 records- 0196US7814137B1Combined interpolation and decimation filter for programmable logic deviceALTERA CORP·Filed 2007·Granted Oct 12, 2010·50 cites·24 claims
- 0295US8751551B2Modular digital signal processing circuitry with optionally usable, dedicated connections between modules of the circuitryALTERA CORP·Filed 2013·Granted Jun 10, 2014·32 cites·10 claims
- 0394US9337782B1Methods and apparatus for adjusting transmit signal clipping thresholdsALTERA CORP·Filed 2014·Granted May 10, 2016·43 cites·23 claims
- 0493US8959136B1Matrix operations in an integrated circuit deviceCHEUNG COLMAN C·Filed 2012·Granted Feb 17, 2015·29 cites·18 claims
- 0593US8543634B1Specialized processing block for programmable integrated circuit deviceXU LEI·Filed 2012·Granted Sep 24, 2013·22 cites·19 claims
- 0693US6998909B1Method to compensate for memory effect in lookup table based digital predistortersALTERA CORP·Filed 2004·Granted Feb 14, 2006·61 cites·46 claims
- 0791US9036734B1Methods and apparatus for performing digital predistortion using time domain and frequency domain alignmentALTERA CORP·Filed 2013·Granted May 19, 2015·27 cites·16 claims
- 0890US7948267B1Efficient rounding circuits and methods in configurable integrated circuit devicesALTERA CORP·Filed 2010·Granted May 24, 2011·15 cites·24 claims
- 0988US9485129B1Multi-standard peak canceling circuitryALTERA CORP·Filed 2014·Granted Nov 1, 2016·14 cites·15 claims
- 1087US7369637B1Adaptive sampling rate converterALTERA CORP·Filed 2004·Granted May 6, 2008·26 cites·29 claims
- 1185US8812576B1QR decomposition in an integrated circuit deviceMAUER VOLKER·Filed 2011·Granted Aug 19, 2014·10 cites·20 claims
- 1282US8386550B1Method for configuring a finite impulse response filter in a programmable logic deviceALTERA CORP·Filed 2006·Granted Feb 26, 2013·13 cites·12 claims
- 1380US10136384B1Methods and apparatus for performing buffer fill level controlled dynamic power scalingALTERA CORP·Filed 2014·Granted Nov 20, 2018·5 cites·15 claims
- 1479US6400290B1Normalization implementation for a logmap decoderALTERA CORP·Filed 2000·Granted Jun 4, 2002·26 cites·48 claims
- 1578US2025240020A1Fast Fourier Transform (FFT) Based Digital Signal Processing (DSP) EngineALTERA CORP·Filed 2025·Application pending·0 cites
- 1677US8549055B2Modular digital signal processing circuitry with optionally usable, dedicated connections between modules of the circuitrySTREICHER KEONE·Filed 2010·Granted Oct 1, 2013·5 cites·15 claims
- 1777US7039091B1Method and apparatus for implementing a two dimensional correlatorALTERA CORP·Filed 2001·Granted May 2, 2006·17 cites·24 claims
- 1876US9966933B1Pipelined systolic finite impulse response filterALTERA CORP·Filed 2016·Granted May 8, 2018·2 cites·20 claims
- 1976US9748928B1Dynamically programmable digital signal processing blocks for finite-impulse-response filtersALTERA CORP·Filed 2016·Granted Aug 29, 2017·2 cites·20 claims
- 2076US9438203B1Dynamically programmable digital signal processing blocks for finite-impulse-response filtersALTERA CORP·Filed 2014·Granted Sep 6, 2016·3 cites·25 claims
- 2175US7680233B1Adaptive sampling rate converterALTERA CORP·Filed 2008·Granted Mar 16, 2010·6 cites·20 claims
- 2273US8620980B1Programmable device with specialized multiplier blocksMAUER VOLKER·Filed 2010·Granted Dec 31, 2013·4 cites·40 claims
- 2372US7095349B1Numerically controlled oscillator and method for operating the sameALTERA CORP·Filed 2005·Granted Aug 22, 2006·5 cites·20 claims
- 2471US7586995B1Peak windowing for crest factor reductionALTERA CORP·Filed 2005·Granted Sep 8, 2009·4 cites·10 claims
- 2570US12278630B2Fast fourier transform (FFT) based digital signal processing (DSP) engineINTEL CORP·Filed 2021·Granted Apr 15, 2025·0 cites·20 claims
- 2669US9379687B1Pipelined systolic finite impulse response filterALTERA CORP·Filed 2014·Granted Jun 28, 2016·2 cites·28 claims
- 2766US8572456B1Avoiding interleaver memory conflictsPAN ZHENGJUN·Filed 2009·Granted Oct 29, 2013·6 cites·19 claims
- 2864US9660624B1Methods and apparatus for implementing feedback loopsALTERA CORP·Filed 2014·Granted May 23, 2017·2 cites·22 claims
- 2961US6944577B1Method and apparatus for extracting data from an oversampled bit streamALTERA CORP·Filed 2003·Granted Sep 13, 2005·7 cites·25 claims
- 3059US2025021305A1Filtering with Tensor StructuresALTERA CORP·Filed 2024·Application pending·0 cites
- 3156US8620977B1Modular digital signal processing circuitry with optionally usable, dedicated connections between modules of the circuitryALTERA CORP·Filed 2013·Granted Dec 31, 2013·0 cites·18 claims
- 3256US8005177B1Peak windowing for crest factor reductionALTERA CORP·Filed 2009·Granted Aug 23, 2011·0 cites·20 claims
- 3354US6910056B1Method and apparatus for implementing a multi-step pseudo random sequence generatorALTERA CORP·Filed 2001·Granted Jun 21, 2005·3 cites·23 claims
- 3453US2023128025A1Systems and methods for decomposed digital filterINTEL CORP·Filed 2022·Application pending·0 cites
- 3551US8583715B1Configuring a CIC filter in a programmable integrated circuit devicePAN ZHENGJUN·Filed 2007·Granted Nov 12, 2013·2 cites·24 claims
- 3651US2023096355A1Techniques For Reducing Filter Distortion In Data Using EmphasisINTEL CORP·Filed 2022·Application pending·0 cites
- 3744US10003341B1Flexible input structure for arithmetic processing blockALTERA CORP·Filed 2016·Granted Jun 19, 2018·0 cites·19 claims
- 3844US8291291B1Data resequencingPAN ZHENGJUN·Filed 2008·Granted Oct 16, 2012·1 cites·20 claims
- 3940US7260154B1Method and apparatus for implementing a multiple constraint length Viterbi decoderALTERA CORP·Filed 2002·Granted Aug 21, 2007·2 cites·41 claims
- 4036US8914716B2Resource sharing in decoder architecturesMAUER VOLKER·Filed 2008·Granted Dec 16, 2014·0 cites·23 claims
- 4135US8578255B1Priming of metrics used by convolutional decodersPAN ZHENGJUN·Filed 2008·Granted Nov 5, 2013·0 cites·21 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →