Inventor · disambiguated record
Volker Strumpen
Also filed as: STRUMPEN VOLKER
16 granted patents·1 pending application·376 citations·filing 1997–2013
92Inventor score
Top patents by PatentIndex Score
17 records- 0194US8230423B2Multithreaded processor architecture with operational latency hidingFRIGO MATTEO·Filed 2005·Granted Jul 24, 2012·52 cites·12 claims
- 0292US6161219ASystem and method for providing checkpointing with precompile directives and supporting software to produce checkpoints, independent of environment constraintsUNIV IOWA RES FOUND·Filed 1997·Granted Dec 12, 2000·281 cites·51 claims
- 0386US8880954B2Temperature-profiled device fingerprint generation and authentication from power-up states of static cellsIBM·Filed 2013·Granted Nov 4, 2014·8 cites·9 claims
- 0479US8495431B2Temperature-profiled device fingerprint generation and authentication from power-up states of static cellsGEBARA FADI H·Filed 2012·Granted Jul 23, 2013·5 cites·21 claims
- 0574US8219857B2Temperature-profiled device fingerprint generation and authentication from power-up states of static cellsGEBARA FADI H·Filed 2008·Granted Jul 10, 2012·7 cites·21 claims
- 0674US8060699B2Spiral cache memory and method of operating a spiral cacheSTRUMPEN VOLKER·Filed 2008·Granted Nov 15, 2011·7 cites·24 claims
- 0773US8370579B2Global instructions for spiral cache managementIBM·Filed 2009·Granted Feb 5, 2013·5 cites·10 claims
- 0870US9009415B2Memory system including a spiral cacheIBM·Filed 2013·Granted Apr 14, 2015·2 cites·10 claims
- 0969US8364895B2Global instructions for spiral cache managementIBM·Filed 2012·Granted Jan 29, 2013·2 cites·10 claims
- 1068US8972703B2Multithreaded processor architecture with operational latency hidingFRIGO MATTEO·Filed 2011·Granted Mar 3, 2015·2 cites·24 claims
- 1161US8527726B2Tiled storage array with systolic move-to-front reorganizationSTRUMPEN VOLKER·Filed 2008·Granted Sep 3, 2013·2 cites·20 claims
- 1260US8543768B2Memory system including a spiral cacheGEBARA FADI H·Filed 2009·Granted Sep 24, 2013·1 cites·16 claims
- 1359US8539185B2Systolic networks for a spiral cacheGEBARA FADI H·Filed 2009·Granted Sep 17, 2013·1 cites·23 claims
- 1455US8689027B2Tiled memory power managementSTRUMPEN VOLKER·Filed 2009·Granted Apr 1, 2014·1 cites·25 claims
- 1553US9542315B2Tiled storage array with systolic move-to-front organizationIBM·Filed 2013·Granted Jan 10, 2017·0 cites·20 claims
- 1646US7933940B2Cyclic segmented prefix circuits for mesh networksIBM·Filed 2006·Granted Apr 26, 2011·0 cites·16 claims
- 1741US2006230409A1Multithreaded processor architecture with implicit granularity adaptationFRIGO MATTEO·Filed 2005·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →