Inventor · disambiguated record
Wenliang Dai
Also filed as: DAI WENLIANG
7 granted patents·7 pending applications·48 citations·filing 2009–2023
82Inventor score
Technology areasG06F
Top patents by PatentIndex Score
14 records- 0189US8949102B2Method and system for power delivery network analysisDAI WENLIANG·Filed 2012·Granted Feb 3, 2015·15 cites·18 claims
- 0289US8539422B2Method and system for power delivery network analysisDAI WENLIANG·Filed 2012·Granted Sep 17, 2013·14 cites·21 claims
- 0388US8631381B2Method and system for power delivery network analysisDAI WENLIANG·Filed 2012·Granted Jan 14, 2014·12 cites·34 claims
- 0468US12159124B2Child application development toolTENCENT TECH SHENZHEN CO LTD·Filed 2023·Granted Dec 3, 2024·0 cites·20 claims
- 0567US8448117B2Adaptive mesh resolution in electric circuit simulation and analysisDAI WENLIANG·Filed 2009·Granted May 21, 2013·7 cites·15 claims
- 0660US11726749B2Child application development method and apparatus, computer device, and storage mediumTENCENT TECH SHENZHEN CO LTD·Filed 2021·Granted Aug 15, 2023·0 cites·20 claims
- 0754US2024160858A1Systems and methods for vision-language model instruction tuningSALESFORCE INC·Filed 2023·Application pending·0 cites
- 0841US2025390550A1Method for accelerated solving of large sparse matrix, system and storage medium thereofXPEEDIC CO LTD·Filed 2023·Application pending·0 cites
- 0939US2025111124A1Circuit simulation optimization method, device, computer device and storage mediumXPEEDIC CO LTD·Filed 2023·Application pending·0 cites
- 1037US2025086160A1Parameterized cell data renewal method, device, computer device and storage mediumXPEEDIC CO LTD·Filed 2022·Application pending·0 cites
- 1137US2024193333A1Multilevel distributed parallel computing method for integrated circuit board simulationXPEEDIC CO LTD·Filed 2022·Application pending·0 cites
- 1235US2025103785A1Chip packaging power distribution network electromagnetic modeling method and systemXPEEDIC CO LTD·Filed 2023·Application pending·0 cites
- 1331US2023385492A1Method for reconstructing physical connection relationships of general EDA model layoutsXPEEDIC CO LTD·Filed 2021·Application pending·0 cites
- 1430US12164476B2Method for real-time extraction of on-chip simulation informationXPEEDIC CO LTD·Filed 2021·Granted Dec 10, 2024·0 cites·6 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →