Inventor · disambiguated record
Wei-Jen Hsia
Also filed as: HSIA WEI-JEN
36 granted patents·3 pending applications·1,482 citations·filing 1993–2008
98Inventor score
Top patents by PatentIndex Score
39 records- 0196US6423628B1Method of forming integrated circuit structure having low dielectric constant material and having silicon oxynitride caps over closely spaced apart metal linesLSI LOGIC CORP·Filed 1999·Granted Jul 23, 2002·218 cites·11 claims
- 0294US6204192B1Plasma cleaning process for openings formed in at least one low dielectric constant insulation layer over copper metallization in integrated circuit structuresLSI LOGIC CORP·Filed 1999·Granted Mar 20, 2001·166 cites·17 claims
- 0393US6881664B2Process for planarizing upper surface of damascene wiring structure for integrated circuit structuresLSI LOGIC CORP·Filed 2003·Granted Apr 19, 2005·75 cites·16 claims
- 0493US6537896B1Process for treating porous low k dielectric material in damascene structure to form a non-porous dielectric diffusion barrier on etched via and trench surfaces in the porous low k dielectric materialLSI LOGIC CORP·Filed 2001·Granted Mar 25, 2003·71 cites·6 claims
- 0593US6114259AProcess for treating exposed surfaces of a low dielectric constant carbon doped silicon oxide dielectric material to protect the material from damageLSI LOGIC CORP·Filed 1999·Granted Sep 5, 2000·218 cites·24 claims
- 0691US6423630B1Process for forming low K dielectric material between metal linesLSI LOGIC CORP·Filed 2000·Granted Jul 23, 2002·66 cites·20 claims
- 0790US6528423B1Process for forming composite of barrier layers of dielectric material to inhibit migration of copper from copper metal interconnect of integrated circuit structure into adjacent layer of low k dielectric materialLSI LOGIC CORP·Filed 2001·Granted Mar 4, 2003·48 cites·16 claims
- 0890US6346490B1Process for treating damaged surfaces of low k carbon doped silicon oxide dielectric material after plasma etching and plasma cleaning stepsLSI LOGIC CORP·Filed 2000·Granted Feb 12, 2002·53 cites·20 claims
- 0988US6232658B1Process to prevent stress cracking of dielectric films on semiconductor wafersLSI LOGIC CORP·Filed 1999·Granted May 15, 2001·93 cites·20 claims
- 1086US6503840B2Process for forming metal-filled openings in low dielectric constant dielectric material while inhibiting via poisoningLSI LOGIC CORP·Filed 2001·Granted Jan 7, 2003·40 cites·20 claims
- 1186US5278103AMethod for the controlled formation of voids in doped glass dielectric filmsLSI LOGIC CORP·Filed 1993·Granted Jan 11, 1994·82 cites·18 claims
- 1284US7393780B2Dual layer barrier film techniques to prevent resist poisoningLSI CORP·Filed 2006·Granted Jul 1, 2008·7 cites·6 claims
- 1383US6492731B1Composite low dielectric constant film for integrated circuit structureLSI LOGIC CORP·Filed 2000·Granted Dec 10, 2002·27 cites·21 claims
- 1480US6812134B1Dual layer barrier film techniques to prevent resist poisoningLSI LOGIC CORP·Filed 2001·Granted Nov 2, 2004·19 cites·13 claims
- 1579US6774057B1Method and structure for forming dielectric layers having reduced dielectric constantsLSI LOGIC CORP·Filed 2002·Granted Aug 10, 2004·22 cites·18 claims
- 1679US6147012AProcess for forming low k silicon oxide dielectric material while suppressing pressure spiking and inhibiting increase in dielectric constantLSI LOGIC CORP·Filed 1999·Granted Nov 14, 2000·52 cites·20 claims
- 1771US6790784B2Plasma treatment of low dielectric constant dielectric material to form structures useful in formation of metal interconnects and/or filled vias for intergrated circuit structureLSI LOGIC CORP·Filed 2003·Granted Sep 14, 2004·12 cites·13 claims
- 1870US7220362B2Planarization with reduced dishingLSI CORP·Filed 2006·Granted May 22, 2007·2 cites·5 claims
- 1970US6756674B1Low dielectric constant silicon oxide-based dielectric layer for integrated circuit structures having improved compatibility with via filler materials, and method of making sameLSI LOGIC CORP·Filed 1999·Granted Jun 29, 2004·36 cites·24 claims
- 2069US6930056B1Plasma treatment of low dielectric constant dielectric material to form structures useful in formation of metal interconnects and/or filled vias for integrated circuit structureLSI LOGIC CORP·Filed 2001·Granted Aug 16, 2005·10 cites·10 claims
- 2164US7312127B2Incorporating dopants to enhance the dielectric properties of metal silicatesLSI CORP·Filed 2006·Granted Dec 25, 2007·1 cites·9 claims
- 2262US6686272B1Anti-reflective coatings for use at 248 nm and 193 nmLSI LOGIC CORP·Filed 2001·Granted Feb 3, 2004·20 cites·11 claims
- 2361US6613665B1Process for forming integrated circuit structure comprising layer of low k dielectric material having antireflective properties in an upper surfaceLSI LOGIC CORP·Filed 2001·Granted Sep 2, 2003·7 cites·19 claims
- 2461US6297555B1Method to obtain a low resistivity and conformity chemical vapor deposition titanium filmLSI LOGIC CORP·Filed 1998·Granted Oct 2, 2001·22 cites·34 claims
- 2560US6204550B1Method and composition for reducing gate oxide damage during RF sputter cleanLSI LOGIC CORP·Filed 1999·Granted Mar 20, 2001·20 cites·11 claims
- 2659US5994211AMethod and composition for reducing gate oxide damage during RF sputter cleanLSI LOGIC CORP·Filed 1997·Granted Nov 30, 1999·20 cites·15 claims
- 2759US5895267AMethod to obtain a low resistivity and conformity chemical vapor deposition titanium filmLSI LOGIC CORP·Filed 1997·Granted Apr 20, 1999·20 cites·19 claims
- 2858US7071094B2Dual layer barrier film techniques to prevent resist poisoningLSI LOGIC CORP·Filed 2004·Granted Jul 4, 2006·4 cites·18 claims
- 2955US7029591B2Planarization with reduced dishingLSI LOGIC CORP·Filed 2003·Granted Apr 18, 2006·3 cites·1 claims
- 3055US5789028AMethod for eliminating peeling at end of semiconductor substrate in metal organic chemical vapor deposition of titanium nitrideLSI LOGIC CORP·Filed 1997·Granted Aug 4, 1998·17 cites·9 claims
- 3154US6794756B2Integrated circuit structure having low dielectric constant material and having silicon oxynitride caps over closely spaced apart metal linesLSI LOGIC CORP·Filed 2002·Granted Sep 21, 2004·5 cites·4 claims
- 3254US2007163993A1Planarization with reduced dishingLSI LOGIC CORP·Filed 2007·Application pending·0 cites
- 3353US6420277B1Process for inhibiting crack formation in low dielectric constant dielectric films of integrated circuit structureLSI LOGIC CORP·Filed 2000·Granted Jul 16, 2002·5 cites·21 claims
- 3453US5719084AMethod for the controlled formation of voids in doped glass dielectric filmsLSI LOGIC CORP·Filed 1995·Granted Feb 17, 1998·16 cites·42 claims
- 3552US7081406B2Interconnect dielectric tuningLSI LOGIC CORP·Filed 2004·Granted Jul 25, 2006·4 cites·13 claims
- 3649US7259462B1Interconnect dielectric tuningLSI CORP·Filed 2006·Granted Aug 21, 2007·0 cites·4 claims
- 3748US7064062B2Incorporating dopants to enhance the dielectric properties of metal silicatesLSI LOGIC CORP·Filed 2003·Granted Jun 20, 2006·1 cites·16 claims
- 3839US2008308937A1Copper-free semiconductor device interface and methods of fabrication and use thereofSVTC TECHNOLOGIES LLC·Filed 2008·Application pending·0 cites
- 3938US2006035457A1Interconnection capacitance reductionCARTER RICHARD J·Filed 2004·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →