Inventor · disambiguated record
Wei Hwang
Also filed as: HWANG WEI · HWANG WEI-KAN
34 granted patents·5 pending applications·215 citations·filing 2005–2020
96Inventor score
Top patents by PatentIndex Score
39 records- 0194US9142285B2Multi-port SRAM with shared write bit-line architecture and selective read path for low power operationUNIV NAT CHIAO TUNG·Filed 2013·Granted Sep 22, 2015·24 cites·9 claims
- 0292US7190187B2Power gating structure having data retention and intermediate modesUNIV NAT CHIAO TUNG·Filed 2005·Granted Mar 13, 2007·33 cites·14 claims
- 0391US10990521B1Data storage system, data storage device and management method thereofASMEDIA TECH INC·Filed 2020·Granted Apr 27, 2021·3 cites·22 claims
- 0491US8345504B2Data-aware dynamic supply random access memoryFARADAY TECH CORP·Filed 2011·Granted Jan 1, 2013·16 cites·10 claims
- 0590US8320164B2Static random access memory with data controlled power supplyCHUANG CHING-TE·Filed 2011·Granted Nov 27, 2012·21 cites·19 claims
- 0687US8659936B2Low power static random access memoryCHUANG CHING-TE·Filed 2010·Granted Feb 25, 2014·13 cites·4 claims
- 0786US8419274B2Fully-on-chip temperature, process, and voltage sensor systemChen shi-wen·Filed 2010·Granted Apr 16, 2013·8 cites·10 claims
- 0882US10430124B1Disk managing method and raid controllerASMEDIA TECH INC·Filed 2018·Granted Oct 1, 2019·3 cites·10 claims
- 0982US8258741B2Solar power management systemWU CHUN-YI·Filed 2010·Granted Sep 4, 2012·7 cites·7 claims
- 1081US8125263B2Charge pumpWU CHUN-YI·Filed 2010·Granted Feb 28, 2012·7 cites·10 claims
- 1180US7259598B2Clock switching circuitUNIV NAT CHIAO TUNG·Filed 2006·Granted Aug 21, 2007·12 cites·8 claims
- 1278US8891289B2Ten-transistor dual-port SRAM with shared bit-line architectureUNIV NAT CHIAO TUNG·Filed 2013·Granted Nov 18, 2014·6 cites·11 claims
- 1378US8804445B2Oscillato based on a 6T SRAM for measuring the bias temperature instabilityCHUANG CHING-TE·Filed 2012·Granted Aug 12, 2014·7 cites·9 claims
- 1478US8498174B2Dual-port subthreshold SRAM cellCHIU YI-TE·Filed 2011·Granted Jul 30, 2013·7 cites·8 claims
- 1578US8237477B1Programmable clock generator used in dynamic-voltage-and-frequency-scaling (DVFS) operated in sub- and near- threshold regionHSIEH CHUNG-YING·Filed 2011·Granted Aug 7, 2012·8 cites·7 claims
- 1674US8437178B2Static random access memory cell and method of operating the sameCHIU YI-TE·Filed 2011·Granted May 7, 2013·6 cites·16 claims
- 1774US8385149B2Gate oxide breakdown-withstanding power switch structureUNIV NAT CHIAO TUNG·Filed 2011·Granted Feb 26, 2013·5 cites·6 claims
- 1869US8427224B2On-chip active decoupling capacitors for regulating voltage of an integrated circuitLIN TIEN-HUNG·Filed 2011·Granted Apr 23, 2013·4 cites·9 claims
- 1967US7849123B2Pipeline-based reconfigurable mixed-radix FFT processorUNIV NAT CHIAO TUNG·Filed 2007·Granted Dec 7, 2010·7 cites·6 claims
- 2066US8259510B2Disturb-free static random access memory cellCHUANG CHING-TE·Filed 2010·Granted Sep 4, 2012·4 cites·16 claims
- 2164US8138795B2Self-aware adaptive power control system and a method for determining the circuit stateHSEIH WEI-CHIH·Filed 2008·Granted Mar 20, 2012·8 cites·20 claims
- 2254US7358768B2XOR-based conditional keeper and an architecture implementing its application to match linesUNIV NAT CHIAO TUNG·Filed 2006·Granted Apr 15, 2008·3 cites·20 claims
- 2351US11494430B2Data storage apparatus and data prediction method thereofASMEDIA TECH INC·Filed 2019·Granted Nov 8, 2022·0 cites·16 claims
- 2449US10198395B2Port multiplier system and operation methodASMEDIA TECH INC·Filed 2017·Granted Feb 5, 2019·0 cites·8 claims
- 2547US11457850B2Neural-signal amplifier and multi-channel neural-signal amplifying systemUNIV NATIONAL CHIAO TUNG·Filed 2019·Granted Oct 4, 2022·0 cites·8 claims
- 2646US2009313422A1Flash memory control apparatus having sequential writing procedure and method thereofGENESYS LOGIC INC·Filed 2008·Application pending·0 cites
- 2745US8072818B2Dual-threshold-voltage two-port sub-threshold SRAM cell apparatusCHANG MU-TIEN·Filed 2009·Granted Dec 6, 2011·2 cites·2 claims
- 2845US7525827B2Stored don't-care based hierarchical search-line schemeUNIV NAT CHIAO TUNG·Filed 2007·Granted Apr 28, 2009·1 cites·11 claims
- 2945US2011016261A1Parallel processing architecture of flash memory and method thereofGENESYS LOGIC INC·Filed 2009·Application pending·0 cites
- 3044US2013031327A1System and method for allocating cache memoryCHANG YUNG·Filed 2011·Application pending·0 cites
- 3139US8487684B2Method for buffering clock skew by using a logical effortHSIEH CHUNG-YING·Filed 2011·Granted Jul 16, 2013·0 cites·8 claims
- 3239US2013028324A1Method and device for decoding a scalable video signal utilizing an inter-layer predictionUNIV NAT CHIAO TUNG·Filed 2011·Application pending·0 cites
- 3336US8854897B2Static random access memory apparatus and bit-line voltage controller thereofCHUANG CHING-TE·Filed 2012·Granted Oct 7, 2014·0 cites·19 claims
- 3436US7738275B2Leakage current cut-off device for ternary content addressable memoryUNIV NAT CHIAO TUNG·Filed 2008·Granted Jun 15, 2010·0 cites·4 claims
- 3536US7260008B2Asynchronous first-in-first-out cellUNIV NAT CHIAO TUNG·Filed 2006·Granted Aug 21, 2007·0 cites·24 claims
- 3635US7903443B2Butterfly match-line structure and search method implemented therebyUNIV NAT CHIAO TUNG·Filed 2007·Granted Mar 8, 2011·0 cites·11 claims
- 3735US7616469B2Super leakage current cut-off device for ternary content addressable memoryUNIV NAT CHIAO TUNG·Filed 2008·Granted Nov 10, 2009·0 cites·7 claims
- 3833US2013223136A1SRAM based on 6 transistor structure including a first inverter, a second inverter, a first pass-gate transistor, and a second pass-gate transistorCHUANG CHING-TE·Filed 2012·Application pending·0 cites
- 3932US8773894B2Static random access memory with ripple bit lines/search lines for improving current leakage/variation tolerance and density/performanceUNIV NAT CHIAO TUNG·Filed 2012·Granted Jul 8, 2014·0 cites·10 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →