Inventor · disambiguated record
Wen-Mei Hwu
Also filed as: HWU WEN-MEI · HWU WEN-MEI W · HWU WEN-MEI WILLIAM
12 granted patents·2 pending applications·379 citations·filing 1995–2023
91Inventor score
Top patents by PatentIndex Score
14 records- 0194US11314950B2Text style transfer using reinforcement learningIBM·Filed 2020·Granted Apr 26, 2022·7 cites·19 claims
- 0293US11704486B2Abstract meaning representation parsing with graph translationIBM·Filed 2020·Granted Jul 18, 2023·6 cites·17 claims
- 0391US6681387B1Method and apparatus for instruction execution hot spot detection and monitoring in a data processing unitUNIV ILLINOIS·Filed 2000·Granted Jan 20, 2004·147 cites·59 claims
- 0484US7302557B1Method and apparatus for modulo scheduled loop execution in a processor architectureIMPACT TECHNOLOGIES INC·Filed 2000·Granted Nov 27, 2007·45 cites·29 claims
- 0575US6263489B1Method and apparatus for debugging of optimized codeHEWLETT PACKARD CO·Filed 1998·Granted Jul 17, 2001·94 cites·12 claims
- 0671US11074189B2FlatFlash system for byte granularity accessibility of memory in a unified memory-storage hierarchyIBM·Filed 2019·Granted Jul 27, 2021·2 cites·20 claims
- 0771US11048447B2Providing direct data access between accelerators and storage in a computing environment, wherein the direct data access is independent of host CPU and the host CPU transfers object map identifying object of the dataIBM·Filed 2019·Granted Jun 29, 2021·1 cites·20 claims
- 0865US11977883B2Reconfigurable crypto-processorUNIV ILLINOIS·Filed 2021·Granted May 7, 2024·0 cites·20 claims
- 0964US5694577AMemory conflict buffer for achieving memory disambiguation in compile-time code scheduleMATSUSHITA ELECTRIC INDUSTRIAL CO LTD·Filed 1995·Granted Dec 2, 1997·47 cites·13 claims
- 1061US7725696B1Method and apparatus for modulo scheduled loop execution in a processor architectureHWU WEN-MEI W·Filed 2007·Granted May 25, 2010·3 cites·28 claims
- 1153US11157275B2Reconfigurable crypto-processorUNIV ILLINOIS·Filed 2018·Granted Oct 26, 2021·0 cites·18 claims
- 1246US6640315B1Method and apparatus for enhancing instruction level parallelismUNIV ILLINOIS·Filed 1999·Granted Oct 28, 2003·27 cites·10 claims
- 1344US2025045094A1Gpu-inititated data access of scaled storageNVIDIA CORP·Filed 2023·Application pending·0 cites
- 1437US2002010911A1Compile time pointer analysis algorithm statement of government interestFiled 2001·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →