Inventor · disambiguated record
Wesley H. Morris
Also filed as: MORRIS WESLEY H · MORRIS WESLEY HAROLD
12 granted patents·3 pending applications·256 citations·filing 1985–2022
93Inventor score
Files withSILICON SPACE TECHNOLOGY CORP7MORRIS WESLEY H5CHERNE RICHARD D1MORRIS WESLEY HAROLD1RCA CORP1
Top patents by PatentIndex Score
15 records- 0193US7304354B2Buried guard ring and radiation hardened isolation structures and fabrication methodsSILICON SPACE TECHNOLOGY CORP·Filed 2004·Granted Dec 4, 2007·67 cites·46 claims
- 0291US9201726B2Memory circuit incorporating radiation-hardened memory scrub engineSILICON SPACE TECHNOLOGY CORP·Filed 2015·Granted Dec 1, 2015·10 cites·20 claims
- 0389US8972819B2Memory circuit incorporating radiation-hardened memory scrub engineSILICON SPACE TECHNOLOGY CORP·Filed 2012·Granted Mar 3, 2015·9 cites·41 claims
- 0489US8497195B2Method for radiation hardening a semiconductor deviceMORRIS WESLEY H·Filed 2012·Granted Jul 30, 2013·8 cites·20 claims
- 0589US8252642B2Fabrication methods for radiation hardened isolation structuresMORRIS WESLEY H·Filed 2009·Granted Aug 28, 2012·16 cites·16 claims
- 0689US8093145B2Methods for operating and fabricating a semiconductor device having a buried guard ring structureMORRIS WESLEY H·Filed 2007·Granted Jan 10, 2012·14 cites·22 claims
- 0788US7804138B2Buried guard ring and radiation hardened isolation structures and fabrication methodsSILICON SPACE TECHNOLOGY CORP·Filed 2006·Granted Sep 28, 2010·12 cites·41 claims
- 0888US7629654B2Buried guard ring structures and fabrication methodsSILICON SPACE TECHNOLOGY CORP·Filed 2007·Granted Dec 8, 2009·12 cites·31 claims
- 0985US8729640B2Method and structure for radiation hardening a semiconductor deviceSILICON SPACE TECHNOLOGY CORP·Filed 2013·Granted May 20, 2014·5 cites·20 claims
- 1085US8278719B2Radiation hardened isolation structures and fabrication methodsMORRIS WESLEY H·Filed 2006·Granted Oct 2, 2012·12 cites·25 claims
- 1180USH1435HSOI CMOS device having body extension for providing sidewall channel stop and bodytieCHERNE RICHARD D·Filed 1991·Granted May 2, 1995·72 cites·3 claims
- 1254US2025015083A1Shallow Buried Guard Ring (SBGR) Isolation Structures and Fabrication Models to Enable Latchup Immunity in CMOS Integrated Circuits Operating in Extreme Radiation Environments and Temperatures RangesMORRIS WESLEY HAROLD·Filed 2022·Application pending·0 cites
- 1351US4662059AMethod of making stabilized silicon-on-insulator field-effect transistors having 100 oriented side and top surfacesRCA CORP·Filed 1985·Granted May 5, 1987·19 cites·9 claims
- 1450US2013059421A1Method for radiation hardening an integrated circuitMORRIS WESLEY H·Filed 2012·Application pending·0 cites
- 1542US2008142899A1Radiation immunity of integrated circuits using backside die contact and electrically conductive layersSILICON SPACE TECHNOLOGY CORP·Filed 2007·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →