Inventor · disambiguated record
Wei-E Wang
Also filed as: WANG WEI · WANG WEI-E
30 granted patents·4 pending applications·192 citations·filing 2007–2021
96Inventor score
Top patents by PatentIndex Score
34 records- 0198US11088258B2Method of forming multiple-Vt FETs for CMOS circuit applicationsSAMSUNG ELECTRONICS CO LTD·Filed 2020·Granted Aug 10, 2021·6 cites·20 claims
- 0298US10026652B2Horizontal nanosheet FETs and method of manufacturing the sameSAMSUNG ELECTRONICS CO LTD·Filed 2016·Granted Jul 17, 2018·21 cites·13 claims
- 0398US9941405B2Nanosheet and nanowire devices having source/drain stressors and methods of manufacturing the sameSAMSUNG ELECTRONICS CO LTD·Filed 2016·Granted Apr 10, 2018·25 cites·15 claims
- 0498US9812449B2Multi-VT gate stack for III-V nanosheet devices with reduced parasitic capacitanceSAMSUNG ELECTRONICS CO LTD·Filed 2016·Granted Nov 7, 2017·30 cites·20 claims
- 0595US11749739B2Method of forming multiple-Vt FETS for CMOS circuit applicationsSAMSUNG ELECTRONICS CO LTD·Filed 2021·Granted Sep 5, 2023·2 cites·20 claims
- 0695US9905672B2Method of forming internal dielectric spacers for horizontal nanosheet FET architecturesSAMSUNG ELECTRONICS CO LTD·Filed 2016·Granted Feb 27, 2018·14 cites·19 claims
- 0795US9064699B2Methods of forming semiconductor patterns including reduced dislocation defects and devices formed using such methodsWANG WEI-E·Filed 2014·Granted Jun 23, 2015·30 cites·20 claims
- 0892US9793403B2Multi-layer fin field effect transistor devices and methods of forming the sameOBRADOVIC BORNA J·Filed 2016·Granted Oct 17, 2017·9 cites·20 claims
- 0991US10770353B2Method of forming multi-threshold voltage devices using dipole-high dielectric constant combinations and devices so formedSAMSUNG ELECTRONICS CO LTD·Filed 2018·Granted Sep 8, 2020·6 cites·15 claims
- 1090US9343303B2Methods of forming low-defect strain-relaxed layers on lattice-mismatched substrates and related semiconductor structures and devicesWANG WEI-E·Filed 2014·Granted May 17, 2016·11 cites·19 claims
- 1188US9870940B2Methods of forming nanosheets on lattice mismatched substratesSAMSUNG ELECTRONICS CO LTD·Filed 2016·Granted Jan 16, 2018·5 cites·20 claims
- 1285US8524562B2Method for reducing Fermi-Level-Pinning in a non-silicon channel MOS deviceWANG WEI-E·Filed 2009·Granted Sep 3, 2013·11 cites·20 claims
- 1384US10586738B2Method of providing source and drain doping for CMOS architecture including FinFET and semiconductor devices so formedSAMSUNG ELECTRONICS CO LTD·Filed 2018·Granted Mar 10, 2020·3 cites·24 claims
- 1484US10026751B2Semiconductor device including a repeater/buffer at higher metal routing layers and methods of manufacturing the sameSAMSUNG ELECTRONICS CO LTD·Filed 2016·Granted Jul 17, 2018·4 cites·17 claims
- 1583US9773906B2Relaxed semiconductor layers with reduced defects and methods of forming the sameWANG WEI-E·Filed 2016·Granted Sep 26, 2017·6 cites·20 claims
- 1681US11069576B2Method of forming multi-threshold voltage devices using dipole-high dielectric constant combinations and devices so formedSAMSUNG ELECTRONICS CO LTD·Filed 2020·Granted Jul 20, 2021·1 cites·5 claims
- 1780US10446400B2Method of forming multi-threshold voltage devices and devices so formedSAMSUNG ELECTRONICS CO LTD·Filed 2018·Granted Oct 15, 2019·2 cites·15 claims
- 1876US10727297B2Complimentary metal-oxide-semiconductor circuit having transistors with different threshold voltages and method of manufacturing the sameSAMSUNG ELECTRONICS CO LTD·Filed 2016·Granted Jul 28, 2020·2 cites·16 claims
- 1975US11476121B2Method of forming multi-threshold voltage devices and devices so formedSAMSUNG ELECTRONICS CO LTD·Filed 2019·Granted Oct 18, 2022·1 cites·17 claims
- 2071US11158738B2Method of forming isolation dielectrics for stacked field effect transistors (FETs)SAMSUNG ELECTRONICS CO LTD·Filed 2019·Granted Oct 26, 2021·1 cites·14 claims
- 2168US9218964B2Antiphase domain boundary-free III-V compound semiconductor material on semiconductor substrate and method for manufacturing thereofWANG GANG·Filed 2011·Granted Dec 22, 2015·2 cites·19 claims
- 2267US11605574B2Method of forming a thermal shield in a monolithic 3-d integrated circuitSAMSUNG ELECTRONICS CO LTD·Filed 2021·Granted Mar 14, 2023·0 cites·19 claims
- 2362US11404405B2Semiconductor device including a repeater/buffer at upper metal routing layers and methods of manufacturing the sameSAMSUNG ELECTRONICS CO LTD·Filed 2020·Granted Aug 2, 2022·0 cites·9 claims
- 2460US11081590B2Metal oxide semiconductor field effect transistor with crystalline oxide layer on a III-V materialSAMSUNG ELECTRONICS CO LTD·Filed 2019·Granted Aug 3, 2021·0 cites·8 claims
- 2559US10971420B2Method of forming a thermal shield in a monolithic 3-D integrated circuitSAMSUNG ELECTRONICS CO LTD·Filed 2019·Granted Apr 6, 2021·0 cites·14 claims
- 2653US10475930B2Method of forming crystalline oxides on III-V materialsSAMSUNG ELECTRONICS CO LTD·Filed 2016·Granted Nov 12, 2019·0 cites·7 claims
- 2751US10854591B2Semiconductor device including a repeater/buffer at upper metal routing layers and methods of manufacturing the sameSAMSUNG ELECTRONICS CO LTD·Filed 2017·Granted Dec 1, 2020·0 cites·10 claims
- 2850US11189600B2Method of forming sacrificial self-aligned features for assisting die-to-die and die-to-wafer direct bondingSAMSUNG ELECTRONICS CO LTD·Filed 2020·Granted Nov 30, 2021·0 cites·19 claims
- 2947US9698234B2Interface layer for gate stack using O3 post treatmentSAMSUNG ELECTRONICS CO LTD·Filed 2015·Granted Jul 4, 2017·0 cites·26 claims
- 3046US2008084335A1Apparatus and method for inputting characters in portable terminalSAMSUNG ELECTRONICS CO LTD·Filed 2007·Application pending·0 cites
- 3143US9691860B2Methods of forming defect-free SRB onto lattice-mismatched substrates and defect-free fins on insulatorsSAMSUNG ELECTRONICS CO LTD·Filed 2015·Granted Jun 27, 2017·0 cites·20 claims
- 3241US2013154112A1Method for Forming Isolation Trenches in Micro-Bump Interconnect Structures and Devices Obtained ThereofIMEC·Filed 2012·Application pending·0 cites
- 3338US2014054549A1Gated circuit structure with ultra-thin, epitaxially-grown tunnel and channel layerLOH WEI-YIP·Filed 2012·Application pending·0 cites
- 3434US2016071729A1Rectangular nanosheet fabricationSAMSUNG ELECTRONICS CO LTD·Filed 2015·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →