Inventor · disambiguated record
Wei Wu
Also filed as: WU WEI · Wu wei-hong
10 granted patents·4 pending applications·39 citations·filing 2013–2021
83Inventor score
Files withINTEL CORP10CHINA MOBILE COMM CORP1MITAC COMPUTING TECH CORP1SPRINT COMMUNICATIONS CO LP1WU WEI1
Top patents by PatentIndex Score
14 records- 0193US9916199B2Method and apparatus for an error tolerance aware data retention scheme in a storage device for multi-scale error tolerant dataINTEL CORP·Filed 2016·Granted Mar 13, 2018·14 cites·21 claims
- 0288US9942779B1Method and system for using customer analytics to detect network eventsSPRINT COMMUNICATIONS CO LP·Filed 2013·Granted Apr 10, 2018·21 cites·20 claims
- 0375US10586147B2Neuromorphic computing device, memory device, system, and method to maintain a spike history for neurons in a neuromorphic computing environmentINTEL CORP·Filed 2016·Granted Mar 10, 2020·3 cites·21 claims
- 0472US10761928B2Combined secure mac and device correction using encrypted parity with multi-key domainsINTEL CORP·Filed 2019·Granted Sep 1, 2020·1 cites·21 claims
- 0566US12430347B2Sparse column-aware encodings for numeric data typesINTEL CORP·Filed 2021·Granted Sep 30, 2025·0 cites·22 claims
- 0649US10241962B2Method and system of virtual workspace linking data with locationWU WEI·Filed 2014·Granted Mar 26, 2019·0 cites·10 claims
- 0748US11914735B2Server with data security measureMITAC COMPUTING TECH CORP·Filed 2021·Granted Feb 27, 2024·0 cites·19 claims
- 0848US10095424B2Apparatus and method for programming non-volatile memory using a multi-cell storage cell groupINTEL CORP·Filed 2016·Granted Oct 9, 2018·0 cites·25 claims
- 0944US2019227750A1Technologies for performing tensor operations in memoryINTEL CORP·Filed 2019·Application pending·0 cites
- 1042US2017322850A1Data synchronization method, system, data synchronization server and terminalCHINA MOBILE COMM CORP·Filed 2013·Application pending·0 cites
- 1139US2020313694A1Detection of adjacent two bit errors in a codewordINTEL CORP·Filed 2019·Application pending·0 cites
- 1237US10043573B2Apparatus and method for endurance friendly programming using lower voltage thresholdsINTEL CORP·Filed 2016·Granted Aug 7, 2018·0 cites·25 claims
- 1336US10083742B2Method and apparatus for programming non-volatile memory using a multi-cell storage cell group to provide error location information for retention errorsINTEL CORP·Filed 2016·Granted Sep 25, 2018·0 cites·27 claims
- 1434US2019042358A1Shared parity check for correcting memory errorsINTEL CORP·Filed 2018·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →