Inventor · disambiguated record
William C. Anderson
Also filed as: ANDERSON WILLIAM · ANDERSON WILLIAM C · ANDERSON WILLIAM CARROLL
37 granted patents·5 pending applications·950 citations·filing 1990–2014
98Inventor score
Top patents by PatentIndex Score
42 records- 0198US5268995AMethod for executing graphics Z-compare and pixel merge instructions in a data processorMOTOROLA INC·Filed 1990·Granted Dec 7, 1993·306 cites·7 claims
- 0285US8484516B2Inter-thread trace alignment method and system for a multi-threaded processorGIANNINI LOUIS ACHILLE·Filed 2007·Granted Jul 9, 2013·23 cites·35 claims
- 0385US8370806B2Non-intrusive, thread-selective, debugging method and system for a multi-thread digital signal processorQUALCOMM INC·Filed 2006·Granted Feb 5, 2013·17 cites·24 claims
- 0485US7398371B2Shared translation look-aside buffer and methodQUALCOMM INC·Filed 2005·Granted Jul 8, 2008·16 cites·9 claims
- 0585US6446181B1System having a configurable cache/SRAM memoryINTEL CORP·Filed 2000·Granted Sep 3, 2002·43 cites·19 claims
- 0684US8341604B2Embedded trace macrocell for enhanced digital signal processor debugging operationsCODRESCU LUCIAN·Filed 2006·Granted Dec 25, 2012·16 cites·37 claims
- 0784US7917907B2Method and system for variable thread allocation and switching in a multithreaded processorQUALCOMM INC·Filed 2005·Granted Mar 29, 2011·14 cites·16 claims
- 0882US7657791B2Method and system for a digital signal processor debugging during power transitionsQUALCOMM INC·Filed 2006·Granted Feb 2, 2010·13 cites·32 claims
- 0982US6526562B1Methods for developing an integrated circuit chip designANALOG DEVICES INC·Filed 2000·Granted Feb 25, 2003·38 cites·17 claims
- 1078US5727229AMethod and apparatus for moving data in a parallel processorMOTOROLA INC·Filed 1996·Granted Mar 10, 1998·102 cites·42 claims
- 1177US7111155B1Digital signal processor computation core with input operand selection from operand bus for dual operationsANALOG DEVICES INC·Filed 2000·Granted Sep 19, 2006·27 cites·9 claims
- 1276US8380966B2Method and system for instruction stuffing operations during non-intrusive digital signal processor debuggingQUALCOMM INC·Filed 2006·Granted Feb 19, 2013·8 cites·35 claims
- 1375US7523295B2Processor and method of grouping and executing dependent instructions in a packetQUALCOMM INC·Filed 2005·Granted Apr 21, 2009·7 cites·22 claims
- 1475US6044392AMethod and apparatus for performing rounding in a data processorMOTOROLA INC·Filed 1997·Granted Mar 28, 2000·75 cites·12 claims
- 1573US7590824B2Mixed superscalar and VLIW instruction issuing and processing method and systemQUALCOMM INC·Filed 2005·Granted Sep 15, 2009·6 cites·25 claims
- 1673US7383420B2Processor and method of indirect register read and write operationsQUALCOMM INC·Filed 2005·Granted Jun 3, 2008·6 cites·18 claims
- 1771US9235418B2Register files for a digital signal processor operating in an interleaved multi-threaded environmentQUALCOMM INC·Filed 2014·Granted Jan 12, 2016·2 cites·19 claims
- 1869US6088782AMethod and apparatus for moving data in a parallel processor using source and destination vector registersMOTOROLA INC·Filed 1997·Granted Jul 11, 2000·56 cites·33 claims
- 1968US5220525ARecoded iterative multiplierMOTOROLA INC·Filed 1991·Granted Jun 15, 1993·53 cites·12 claims
- 2067US5619711AMethod and data processing system for arbitrary precision on numbersMOTOROLA INC·Filed 1994·Granted Apr 8, 1997·46 cites·25 claims
- 2166US7685411B2Multi-mode instruction memory unitQUALCOMM INC·Filed 2005·Granted Mar 23, 2010·3 cites·28 claims
- 2266US6859872B1Digital signal processor computation core with pipeline having memory access stages and multiply accumulate stages positioned for efficient operationANALOG DEVICES INC·Filed 2000·Granted Feb 22, 2005·12 cites·10 claims
- 2365US7814487B2System and method of executing program threads in a multi-threaded processorQUALCOMM INC·Filed 2005·Granted Oct 12, 2010·3 cites·38 claims
- 2465US7702889B2Shared interrupt control method and system for a digital signal processorQUALCOMM INC·Filed 2005·Granted Apr 20, 2010·3 cites·26 claims
- 2562US7526633B2Method and system for encoding variable length packets with variable instruction sizesQUALCOMM INC·Filed 2005·Granted Apr 28, 2009·2 cites·12 claims
- 2661US7984281B2Shared interrupt controller for a multi-threaded processorQUALCOMM INC·Filed 2007·Granted Jul 19, 2011·2 cites·3 claims
- 2758US8533530B2Method and system for trusted/untrusted digital signal processor debugging operationsCODRESCU LUCIAN·Filed 2006·Granted Sep 10, 2013·1 cites·30 claims
- 2858US7797366B2Power-efficient sign extension for booth multiplication methods and systemsQUALCOMM INC·Filed 2006·Granted Sep 14, 2010·1 cites·24 claims
- 2958US7360059B2Variable width alignment engine for aligning instructions based on transition between buffersANALOG DEVICES INC·Filed 2006·Granted Apr 15, 2008·1 cites·18 claims
- 3055US7082516B1Aligning instructions using a variable width alignment engine having an intelligent buffer refill mechanismANALOG DEVICES INC·Filed 2000·Granted Jul 25, 2006·4 cites·12 claims
- 3154US6898695B2Use of a future file for data address calculations in a pipelined processorANALOG DEVICES INC·Filed 2001·Granted May 24, 2005·3 cites·22 claims
- 3253US5276635AMethod and apparatus for performing carry look-ahead addition in a data processorMOTOROLA INC·Filed 1993·Granted Jan 4, 1994·26 cites·10 claims
- 3346US8713286B2Register files for a digital signal processor operating in an interleaved multi-threaded environmentAHMED MUHAMMAD·Filed 2005·Granted Apr 29, 2014·0 cites·28 claims
- 3444US8745627B2System and method of controlling power in a multi-threaded processorANDERSON WILLIAM C·Filed 2005·Granted Jun 3, 2014·0 cites·47 claims
- 3544US7849466B2Controlling execution mode of program threads by applying a mask to a control register in a multi-threaded processorQUALCOMM INC·Filed 2005·Granted Dec 7, 2010·0 cites·31 claims
- 3644US2006230253A1Unified non-partitioned register files for a digital signal processor operating in an interleaved multi-threaded environmentCODRESCU LUCIAN·Filed 2005·Application pending·0 cites
- 3743US6763453B2Security on hardware loopsINTEL CORP·Filed 2000·Granted Jul 13, 2004·0 cites·46 claims
- 3842US2006206902A1Variable interleaved multithreaded processor method and systemJAMIL SUJAT·Filed 2005·Application pending·0 cites
- 3941US2012297256A1Large Ram CachePLONDKE ERICH JAMES·Filed 2011·Application pending·0 cites
- 4040US2006230257A1System and method of using a predicate value to access a register fileAHMED MUHAMMAD·Filed 2005·Application pending·0 cites
- 4139US5265043AWallace tree multiplier array having an improved layout topologyMOTOROLA INC·Filed 1993·Granted Nov 23, 1993·15 cites·12 claims
- 4238US2007094478A1Pointer computation method and system for a scalable, programmable circular bufferPLONDKE ERICH·Filed 2005·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →