Inventor · disambiguated record
William L. Devanney
Also filed as: DEVANNEY WILLIAM L
8 granted patents·1 pending application·314 citations·filing 1994–2001
90Inventor score
Top patents by PatentIndex Score
9 records- 0192US6243779B1Noise reduction system and method for reducing switching noise in an interface to a large width busINTEGRATED DEVICE TECH·Filed 1996·Granted Jun 5, 2001·83 cites·32 claims
- 0284US5541883AMethod and apparatus for simultaneous long writes of multiple cells of a row in a static ramINTEGRATED DEVICE TECH·Filed 1995·Granted Jul 30, 1996·56 cites·8 claims
- 0377US6311316B1Designing integrated circuit gate arrays using programmable logic device bitstreamsCLEAR LOGIC INC·Filed 1998·Granted Oct 30, 2001·72 cites·20 claims
- 0476US6763406B1Noise reduction system and method for reducing switching noise in an interface to a large width busINTEGRATED DEVICE TECH·Filed 2001·Granted Jul 13, 2004·20 cites·88 claims
- 0573US6225652B1Vertical laser fuse structure allowing increased packing densityCLEAR LOGIC INC·Filed 1999·Granted May 1, 2001·46 cites·19 claims
- 0658US6191641B1Zero power fuse circuit using subthreshold conductionCLEAR LOGIC INC·Filed 1999·Granted Feb 20, 2001·18 cites·26 claims
- 0749US5910922AMethod for testing data retention in a static random access memory using isolated Vcc supplyINTEGRATED DEVICE TECH·Filed 1997·Granted Jun 8, 1999·12 cites·10 claims
- 0841US2003200520A1Methods and systems for designing integrated circuit gate arraysFiled 2001·Application pending·0 cites
- 0939US5440524AMethod and apparatus for simuilataneous long writes of multiple cells of a row in a static ramINTEGRATED DEVICE TECH·Filed 1994·Granted Aug 8, 1995·7 cites·1 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →