Inventor · disambiguated record
William M. Gervasi
Also filed as: GERVASI WILLIAM M · GERVASI WILLIAM MICHAEL
9 granted patents·7 pending applications·815 citations·filing 1997–2015
92Inventor score
Top patents by PatentIndex Score
16 records- 0198US8345427B2Module having at least two surfaces and at least one thermally conductive layer therebetweenNETLIST INC·Filed 2010·Granted Jan 1, 2013·63 cites·32 claims
- 0298US7839645B2Module having at least two surfaces and at least one thermally conductive layer therebetweenNETLIST INC·Filed 2009·Granted Nov 23, 2010·83 cites·20 claims
- 0398US7630202B2High density module having at least two substrates and at least one thermally conductive layer therebetweenNETLIST INC·Filed 2008·Granted Dec 8, 2009·81 cites·20 claims
- 0498US7375970B2High density memory module using stacked printed circuit boardsNETLIST INC·Filed 2007·Granted May 20, 2008·95 cites·21 claims
- 0598US7286436B2High-density memory module utilizing low-density memory componentsNETLIST INC·Filed 2005·Granted Oct 23, 2007·190 cites·20 claims
- 0698US7254036B2High density memory module using stacked printed circuit boardsNETLIST INC·Filed 2005·Granted Aug 7, 2007·184 cites·21 claims
- 0794US5948083ASystem and method for self-adjusting data strobeS3 INC·Filed 1997·Granted Sep 7, 1999·118 cites·7 claims
- 0859US8971045B1Module having at least one thermally conductive layer between printed circuit boardsNETLIST INC·Filed 2012·Granted Mar 3, 2015·0 cites·23 claims
- 0947US2016124888A1Memory Bus Loading and Conditioning ModuleGERVASI WILLIAM MICHAEL·Filed 2014·Application pending·0 cites
- 1043US2014304445A1Memory bus loading and conditioning moduleGERVASI WILLIAM MICHAEL·Filed 2013·Application pending·0 cites
- 1141US2005094465A1Printed circuit board memory module with embedded passive componentsNETLIST INC·Filed 2004·Application pending·0 cites
- 1240US2005018495A1Arrangement of integrated circuits in a memory moduleNETLIST INC·Filed 2004·Application pending·0 cites
- 1339US8065475B2Registered dual in-line memory module having an extended register feature setGERVASI WILLIAM M·Filed 2005·Granted Nov 22, 2011·1 cites·25 claims
- 1435US2015301977A1Distributed Termination for Flyby Memory BusesGERVASI WILLIAM MICHAEL·Filed 2015·Application pending·0 cites
- 1532US2005044302A1Non-standard dual in-line memory modules with more than two ranks of memory per module and multiple serial-presence-detect devices to simulate multiple modulesFiled 2004·Application pending·0 cites
- 1632US2005086037A1Memory device load simulatorFiled 2004·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →