Inventor · disambiguated record
William L. Lynch
Also filed as: LYNCH WILLIAM · LYNCH WILLIAM L · LYNCH WILLIAM LEE
27 granted patents·1,149 citations·filing 1994–2012
97Inventor score
Top patents by PatentIndex Score
27 records- 0197US7382787B1Packet routing and switching deviceCISCO TECH INC·Filed 2002·Granted Jun 3, 2008·290 cites·29 claims
- 0293US8270401B1Packet routing and switching deviceBARNES PETER M·Filed 2003·Granted Sep 18, 2012·116 cites·6 claims
- 0392US7418536B2Processor having systolic array pipeline for processing data packetsCISCO TECH INC·Filed 2006·Granted Aug 26, 2008·30 cites·17 claims
- 0489US7069372B1Processor having systolic array pipeline for processing data packetsCISCO TECH INC·Filed 2002·Granted Jun 27, 2006·61 cites·15 claims
- 0589US5958041ALatency prediction in a pipelined microarchitectureSUN MICROSYSTEMS INC·Filed 1997·Granted Sep 28, 1999·168 cites·20 claims
- 0683US9094237B2Packet routing and switching deviceBARNES PETER M·Filed 2012·Granted Jul 28, 2015·7 cites·19 claims
- 0783US7554914B1System and method for adaptively balancing network traffic over router output portsCISCO TECH INC·Filed 2003·Granted Jun 30, 2009·37 cites·14 claims
- 0882US7852852B2Method for compressing route data in a routerCISCO TECH INC·Filed 2008·Granted Dec 14, 2010·9 cites·20 claims
- 0979US7453883B1Method for compressing route data in a routerCISCO TECH INC·Filed 2003·Granted Nov 18, 2008·25 cites·14 claims
- 1078US7706386B2Fast 2-key schedulerCISCO TECH INC·Filed 2005·Granted Apr 27, 2010·8 cites·19 claims
- 1175US7525904B1Redundant packet routing and switching device and methodCISCO TECH INC·Filed 2003·Granted Apr 28, 2009·21 cites·15 claims
- 1275US7450438B1Crossbar apparatus for a forwarding table memory in a routerCISCO TECH INC·Filed 2003·Granted Nov 11, 2008·17 cites·7 claims
- 1374US8270399B2Crossbar apparatus for a forwarding table memory in a routerHOLST JOHN C·Filed 2008·Granted Sep 18, 2012·5 cites·23 claims
- 1471US5754819ALow-latency memory indexing method and structureSUN MICROSYSTEMS INC·Filed 1994·Granted May 19, 1998·54 cites·18 claims
- 1570US6487715B1Dynamic code motion optimization and path tracingSUN MICROSYSTEMS INC·Filed 1999·Granted Nov 26, 2002·58 cites·17 claims
- 1669US6078587AMechanism for coalescing non-cacheable storesSUN MICROSYSTEMS INC·Filed 1997·Granted Jun 20, 2000·35 cites·6 claims
- 1768US7710991B1Scalable packet routing and switching device and methodCISCO TECH INC·Filed 2003·Granted May 4, 2010·12 cites·16 claims
- 1868US6317810B1Microprocessor having a prefetch cacheSUN MICROSYSTEMS INC·Filed 1997·Granted Nov 13, 2001·57 cites·20 claims
- 1966US7489689B2Method, system and apparatus for scheduling a large pool of resourcesCISCO TECH INC·Filed 2005·Granted Feb 10, 2009·3 cites·32 claims
- 2052US5898852ALoad instruction steering in a dual data cache microarchitectureSUN MICROSYSTEMS INC·Filed 1997·Granted Apr 27, 1999·28 cites·20 claims
- 2148US5878252AMicroprocessor configured to generate help instructions for performing data cache fillsSUN MICROSYSTEMS INC·Filed 1997·Granted Mar 2, 1999·20 cites·22 claims
- 2245US6076147ANon-inclusive cache system using pipelined snoop busSUN MICROSYSTEMS INC·Filed 1997·Granted Jun 13, 2000·22 cites·20 claims
- 2344US6016532AMethod for handling data cache misses using help instructionsSUN MICROSYSTEMS INC·Filed 1997·Granted Jan 18, 2000·15 cites·26 claims
- 2443US6164840AEnsuring consistency of an instruction cache with a store cache check and an execution blocking flush instruction in an instruction queueSUN MICROSYSTEMS INC·Filed 1997·Granted Dec 26, 2000·15 cites·16 claims
- 2543US5900018AProcessor-implemented method of controlling data access to shared resource via exclusive access control write-cacheSUN MICROSYSTEMS INC·Filed 1997·Granted May 4, 1999·15 cites·12 claims
- 2637US6061766ANon-inclusive cache method using pipelined snoop busSUN MICROSYSTEMS INC·Filed 1997·Granted May 9, 2000·13 cites·18 claims
- 2736US5649126AParallel signal bus with reduced miller effect capacitanceSUN MICROSYSTEMS INC·Filed 1995·Granted Jul 15, 1997·8 cites·15 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →