Inventor · disambiguated record
Xiaowei Shen
Also filed as: SHEN XIAOWEI
47 granted patents·10 pending applications·610 citations·filing 1999–2024
98Inventor score
Top patents by PatentIndex Score
57 records- 0195US7913041B2Cache reconfiguration based on analyzing one or more characteristics of run-time performance data or software hintIBM·Filed 2008·Granted Mar 22, 2011·38 cites·16 claims
- 0295US7392352B2Computer architecture for shared memory accessMASSACHUSETTS INST TECHNOLOGY·Filed 2005·Granted Jun 24, 2008·46 cites·33 claims
- 0394US8131894B2Method and system for a sharing bufferCAIN III HAROLD WADE·Filed 2009·Granted Mar 6, 2012·55 cites·18 claims
- 0491US7454573B2Cost-conscious pre-emptive cache line displacement and relocation mechanismsIBM·Filed 2005·Granted Nov 18, 2008·25 cites·21 claims
- 0591US7350034B2Architecture support of best-effort atomic transactions for multiprocessor systemsIBM·Filed 2005·Granted Mar 25, 2008·25 cites·12 claims
- 0690US7634642B2Mechanism to save and restore cache and translation trace for fast context switchIBM·Filed 2006·Granted Dec 15, 2009·23 cites·21 claims
- 0788US7844778B2Intelligent cache replacement mechanism with varying and adaptive temporal residency requirementsIBM·Filed 2006·Granted Nov 30, 2010·19 cites·22 claims
- 0888US6636950B1Computer architecture for shared memory accessMASSACHUSETTS INST TECHNOLOGY·Filed 1999·Granted Oct 21, 2003·116 cites·29 claims
- 0987US8140764B2System for reconfiguring cache memory having an access bit associated with a sector of a lower-level cache memory and a granularity bit associated with a sector of a higher-level cache memorySHEN XIAOWEI·Filed 2011·Granted Mar 20, 2012·9 cites·3 claims
- 1086US6526481B1Adaptive cache coherence protocolsMASSACHUSETTS INST TECHNOLOGY·Filed 2000·Granted Feb 25, 2003·41 cites·8 claims
- 1183US7478197B2Adaptive mechanisms for supplying volatile data copies in multiprocessor systemsIBM·Filed 2006·Granted Jan 13, 2009·15 cites·4 claims
- 1281US7437520B2Adaptive snoop-and-forward mechanisms for multiprocessor systemsIBM·Filed 2005·Granted Oct 14, 2008·10 cites·6 claims
- 1380US7437517B2Methods and arrangements to manage on-chip memory to reduce memory latencyIBM·Filed 2005·Granted Oct 14, 2008·9 cites·9 claims
- 1479US7395407B2Mechanisms and methods for using data access patternsIBM·Filed 2005·Granted Jul 1, 2008·10 cites·20 claims
- 1579US7228388B2Enabling and disabling cache bypass using predicted cache line usageIBM·Filed 2004·Granted Jun 5, 2007·26 cites·21 claims
- 1678US7457926B2Cache line replacement monitoring and profilingIBM·Filed 2005·Granted Nov 25, 2008·8 cites·1 claims
- 1776US8140828B2Handling transaction buffer overflow in multiprocessor by re-executing after waiting for peer processors to complete pending transactions and bypassing the bufferSHEN XIAOWEI·Filed 2008·Granted Mar 20, 2012·8 cites·19 claims
- 1875US7895392B2Color-based cache monitoringIBM·Filed 2007·Granted Feb 22, 2011·7 cites·19 claims
- 1975US7568073B2Mechanisms and methods of cache coherence in network-based multiprocessor systems with ring-based snoop response collectionIBM·Filed 2006·Granted Jul 28, 2009·7 cites·18 claims
- 2074US7574562B2Latency-aware thread scheduling in non-uniform cache architecture systemsIBM·Filed 2006·Granted Aug 11, 2009·6 cites·3 claims
- 2173US8671248B2Architecture support of memory access coloringSHEN XIAOWEI·Filed 2007·Granted Mar 11, 2014·6 cites·18 claims
- 2272US7913048B2Data subscribe-and-publish mechanisms and methods for producer-consumer pre-fetch communicationsIBM·Filed 2006·Granted Mar 22, 2011·6 cites·20 claims
- 2372US7287122B2Data replication in multiprocessor NUCA systems to reduce horizontal cache thrashingIBM·Filed 2004·Granted Oct 23, 2007·17 cites·15 claims
- 2471US8190824B2Cache line replacement monitoring and profilingSHEN XIAOWEI·Filed 2008·Granted May 29, 2012·4 cites·31 claims
- 2571US7856535B2Adaptive snoop-and-forward mechanisms for multiprocessor systemsIBM·Filed 2008·Granted Dec 21, 2010·4 cites·14 claims
- 2669US10623822B2Virtual cable modem termination system redundancyCISCO TECH INC·Filed 2017·Granted Apr 14, 2020·2 cites·20 claims
- 2769US8166255B2Reservation required transactionsSHEN XIAOWEI·Filed 2011·Granted Apr 24, 2012·2 cites·8 claims
- 2868US7516306B2Computer program instruction architecture, system and process using partial ordering for adaptive response to memory latenciesIBM·Filed 2004·Granted Apr 7, 2009·11 cites·3 claims
- 2968US7308538B2Scope-based cache coherenceIBM·Filed 2004·Granted Dec 11, 2007·13 cites·47 claims
- 3067US6757787B2Adaptive cache coherence protocolsMASSACHUSETTS INST TECHNOLOGY·Filed 2002·Granted Jun 29, 2004·11 cites·6 claims
- 3165US8799581B2Cache coherence monitoring and feedbackSHEN XIAOWEI·Filed 2007·Granted Aug 5, 2014·3 cites·17 claims
- 3263US9141547B2Architecture support of best-effort atomic transactions for multiprocessor systemsSHEN XIAOWEI·Filed 2008·Granted Sep 22, 2015·2 cites·6 claims
- 3363US7945741B2Reservation required transactionsIBM·Filed 2007·Granted May 17, 2011·2 cites·6 claims
- 3463US7467280B2Method for reconfiguring cache memory based on at least analysis of heat generated during runtime, at least by associating an access bit with a cache line and associating a granularity bit with a cache line in level-2 cacheIBM·Filed 2006·Granted Dec 16, 2008·2 cites·1 claims
- 3563US7266642B2Cache residence predictionIBM·Filed 2004·Granted Sep 4, 2007·9 cites·19 claims
- 3661US8789028B2Memory access monitoringSHEN XIAOWEI·Filed 2006·Granted Jul 22, 2014·2 cites·11 claims
- 3760US7934061B2Methods and arrangements to manage on-chip memory to reduce memory latencyIBM·Filed 2008·Granted Apr 26, 2011·1 cites·9 claims
- 3858US7904657B2Cache residence predictionIBM·Filed 2007·Granted Mar 8, 2011·1 cites·15 claims
- 3958US7343454B2Methods to maintain triangle ordering of coherence messagesIBM·Filed 2004·Granted Mar 11, 2008·6 cites·27 claims
- 4052US12072842B2Software-based log managementDELL PRODUCTS LP·Filed 2022·Granted Aug 27, 2024·0 cites·20 claims
- 4152US12045159B2Automation test acceleratorDELL PRODUCTS LP·Filed 2022·Granted Jul 23, 2024·0 cites·20 claims
- 4252US9003169B2Systems and methods for indirect register access using status-checking and status-setting instructionsBACON DAVID F·Filed 2009·Granted Apr 7, 2015·0 cites·8 claims
- 4352US7457922B2Cache line placement prediction for multiprocessor non-uniform cache architecture systemsIBM·Filed 2004·Granted Nov 25, 2008·2 cites·13 claims
- 4451US9021482B2Reordering data responses using ordered indicia in a linked listGANESH BRINDA·Filed 2007·Granted Apr 28, 2015·1 cites·3 claims
- 4551US2025225061A1Automated menu testingDELL PRODUCTS LP·Filed 2024·Application pending·0 cites
- 4651US2009083492A1Cost-conscious pre-emptive cache line displacement and relocation mechanismsIBM·Filed 2008·Application pending·0 cites
- 4750US8131938B2Adaptive mechanisms and methods for supplying volatile data copies in multiprocessor systemsSHEN XIAOWEI·Filed 2008·Granted Mar 6, 2012·0 cites·12 claims
- 4848US2024241815A1Method for efficiently improving test case coverage and robustnessDELL PRODUCTS LP·Filed 2023·Application pending·0 cites
- 4947US2024338296A1Efficient firmware testingDELL PRODUCTS LP·Filed 2023·Application pending·0 cites
- 5047US2009119667A1Method and apparatus for implementing transaction memoryHOU RUI·Filed 2008·Application pending·0 cites
Showing the top 50 of 57 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →