Inventor · disambiguated record
Xuhao Huang
Also filed as: HUANG XUHAO
17 granted patents·1 pending application·80 citations·filing 2009–2022
92Inventor score
Top patents by PatentIndex Score
18 records- 0194US10003328B1Hybrid pulse-width control circuit with process and offset calibrationQUALCOMM INC·Filed 2017·Granted Jun 19, 2018·24 cites·20 claims
- 0292US10812056B1Method of generating precise and PVT-stable time delay or frequency using CMOS circuitsQUALCOMM INC·Filed 2019·Granted Oct 20, 2020·8 cites·27 claims
- 0390US9973081B1Low-power low-duty-cycle switched-capacitor voltage dividerQUALCOMM INC·Filed 2017·Granted May 15, 2018·6 cites·20 claims
- 0488US11705897B2Delay line with process-voltage-temperature robustness, linearity, and leakage current compensationQUALCOMM INC·Filed 2021·Granted Jul 18, 2023·2 cites·21 claims
- 0587US10013010B1Voltage droop mitigation circuit for power supply networkQUALCOMM INC·Filed 2017·Granted Jul 3, 2018·6 cites·25 claims
- 0687US9191193B1Clock synchronizationQUALCOMM INC·Filed 2014·Granted Nov 17, 2015·11 cites·21 claims
- 0787US9123408B2Low latency synchronization scheme for mesochronous DDR systemQUALCOMM INC·Filed 2013·Granted Sep 1, 2015·10 cites·25 claims
- 0880US12101089B2Enhanced rising and falling transitions for level shifting low-voltage input signalsQUALCOMM INC·Filed 2022·Granted Sep 24, 2024·1 cites·10 claims
- 0977US9602433B2Systems and methods for sharing a serial communication port between a plurality of communication channelsQUALCOMM INC·Filed 2013·Granted Mar 21, 2017·4 cites·42 claims
- 1071US10185337B1Low-power temperature-insensitive current bias circuitQUALCOMM INC·Filed 2018·Granted Jan 22, 2019·2 cites·16 claims
- 1166US10553531B2Process-invariant resistor and capacitor pairQUALCOMM INC·Filed 2017·Granted Feb 4, 2020·1 cites·14 claims
- 1264US8680891B2High voltage tolerant differential receiverSRIVASTAVA ANKIT·Filed 2011·Granted Mar 25, 2014·2 cites·20 claims
- 1364US8446204B2High voltage tolerant receiverSRIVASTAVA ANKIT·Filed 2011·Granted May 21, 2013·2 cites·19 claims
- 1462US11196410B2Method of generating precise and PVT-stable time delay or frequency using CMOS circuitsQUALCOMM INC·Filed 2020·Granted Dec 7, 2021·0 cites·26 claims
- 1552US9437278B2Low latency synchronization scheme for mesochronous DDR systemQUALCOMM INC·Filed 2015·Granted Sep 6, 2016·0 cites·24 claims
- 1647US9478268B2Distributed clock synchronizationQUALCOMM INC·Filed 2014·Granted Oct 25, 2016·0 cites·19 claims
- 1741US8076963B2Delay-locked loop having a delay independent of input signal duty cycle variationHUANG XUHAO·Filed 2009·Granted Dec 13, 2011·1 cites·22 claims
- 1838US2014266103A1Digitally assisted regulation for an integrated capless low-dropout (ldo) voltage regulatorQUALCOMM INC·Filed 2013·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →