Inventor · disambiguated record
Yaron Slezak
Also filed as: SLEZAK YARON
18 granted patents·270 citations·filing 1994–2013
94Inventor score
Files withSLEZAK YARON4WAFERSCALE INTEGRATION INC4BAR-NIV AMIR3RAPHAELI DAN2ST MICROELECTRONICS INC2
Top patents by PatentIndex Score
18 records- 0192US8576903B2Techniques for adaptively adjusting decision levels of a PAM-N decision feedback equalizerRAPHAELI DAN·Filed 2011·Granted Nov 5, 2013·24 cites·18 claims
- 0289US8594262B2Apparatus and method thereof for clock and data recovery of N-PAM encoded signals using a conventional 2-PAM CDR circuitSLEZAK YARON·Filed 2011·Granted Nov 26, 2013·19 cites·23 claims
- 0386US8804809B2Techniques for setting feedback coefficients of a PAM-N decision feedback equalizerRAPHAELI DAN·Filed 2011·Granted Aug 12, 2014·10 cites·23 claims
- 0484US9197023B2Apparatus for enabling simultaneous content streaming and power charging of handheld devicesBAR-NIV AMIR·Filed 2011·Granted Nov 24, 2015·6 cites·22 claims
- 0577US6243842B1Method and apparatus for operating on a memory unit via a JTAG portST MICROELECTRONICS INC·Filed 1998·Granted Jun 5, 2001·95 cites·15 claims
- 0671US8886852B2Techniques for achieving complete interoperability between different types of data and multimedia interfaces in handheld devicesBAR-NIV AMIR·Filed 2011·Granted Nov 11, 2014·2 cites·16 claims
- 0769US5682353ASelf adjusting sense amplifier clock delay circuitWAFERSCALE INTEGRATION INC·Filed 1996·Granted Oct 28, 1997·32 cites·25 claims
- 0868US8837573B2Apparatus and method thereof for compensating for gain changes of N-PAM modulate signalsDORON ERAN·Filed 2011·Granted Sep 16, 2014·6 cites·11 claims
- 0965US8949481B2Techniques for achieving complete interoperability between different types of multimedia display interfacesBAR-NIV AMIR·Filed 2009·Granted Feb 3, 2015·1 cites·20 claims
- 1061US5696730AFirst read cycle circuit for semiconductor memoryWAFERSCALE INTEGRATION INC·Filed 1996·Granted Dec 9, 1997·21 cites·21 claims
- 1160US6430719B1General port capable of implementing the JTAG protocolST MICROELECTRONICS INC·Filed 1998·Granted Aug 6, 2002·23 cites·20 claims
- 1256US8878590B2Techniques for switching between AC-coupled connectivity and DC-coupled connectivityTRANSWITCH CORP·Filed 2013·Granted Nov 4, 2014·1 cites·20 claims
- 1353US9423812B2Current mode boost converter using slope compensationSLEZAK YARON·Filed 2012·Granted Aug 23, 2016·1 cites·20 claims
- 1452US6628173B2Data and clock extractor with improved linearityCONEXANT SYSTEMS INC·Filed 2001·Granted Sep 30, 2003·7 cites·17 claims
- 1551US5719818ARow decoder having triple transistor word line driversWAFERSCALE INTEGRATION INC·Filed 1996·Granted Feb 17, 1998·18 cites·11 claims
- 1646US8222874B2Current mode boost converter using slope compensationSLEZAK YARON·Filed 2007·Granted Jul 17, 2012·2 cites·20 claims
- 1737US9288065B2Techniques for protecting digital multimedia interfacesSLEZAK YARON·Filed 2012·Granted Mar 15, 2016·0 cites·10 claims
- 1824US5511032ASource pre-charge system in a memory arrayWAFERSCALE INTEGRATION INC·Filed 1994·Granted Apr 23, 1996·2 cites·7 claims
Join the waitlist — get patent alerts
Get an alert when Yaron Slezak files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →