Inventor · disambiguated record
Yen-Teng Ho
Also filed as: HO YEN-TENG
6 granted patents·4 pending applications·11 citations·filing 2010–2025
75Inventor score
Top patents by PatentIndex Score
10 records- 0184US11784119B2Three dimensional integrated circuit and fabrication thereofTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2021·Granted Oct 10, 2023·1 cites·20 claims
- 0284US9893188B2Semiconductor structure with template for transition metal dichalcogenides channel material growthTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2016·Granted Feb 13, 2018·4 cites·19 claims
- 0384US9349806B2Semiconductor structure with template for transition metal dichalcogenides channel material growthTAIWAN SEMICONDUCTOR MFG·Filed 2014·Granted May 24, 2016·6 cites·20 claims
- 0477US12211789B2Three dimensional integrated circuit and fabrication thereofTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2023·Granted Jan 28, 2025·0 cites·20 claims
- 0574US2024395698A1Three dimensional integrated circuit and fabrication thereofTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2024·Application pending·0 cites
- 0669US2025267904A1Transistors having two-dimensional semiconductor channelsTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2025·Application pending·0 cites
- 0765US12310073B2Transistors having two-dimensional semiconductor channelsTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2022·Granted May 20, 2025·0 cites·20 claims
- 0842US8921851B2Non-polar plane of wurtzite structure materialUNIV NAT CHIAO TUNG·Filed 2013·Granted Dec 30, 2014·0 cites·14 claims
- 0941US2015004435A1Method for growing non-polar m-plane epitaxial layer of wurtzite semiconductors on single crystal oxide substratesUNIV NAT CHIAO TUNG·Filed 2014·Application pending·0 cites
- 1033US2011062437A1Method for growing non-polar m-plane epitaxial layer of wurtzite semiconductors on single crystal oxide substratesUNIV NAT CHIAO TUNG·Filed 2010·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →