Inventor · disambiguated record
Yi-Kan Cheng
Also filed as: CHENG YI-KAN
121 granted patents·29 pending applications·1,569 citations·filing 2006–2025
99Inventor score
Files withTAIWAN SEMICONDUCTOR MFG CO LTD85TAIWAN SEMICONDUCTOR MFG29SU KE-YING5CHEN HUANG-YU4HSU CHIN-CHANG4
Top patents by PatentIndex Score
150 records- 0199US11282829B2Integrated circuit with mixed row heightsTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2020·Granted Mar 22, 2022·16 cites·20 claims
- 0298US8826213B1Parasitic capacitance extraction for FinFETsTAIWAN SEMICONDUCTOR MFG·Filed 2013·Granted Sep 2, 2014·440 cites·20 claims
- 0397US8887106B2Method of generating a bias-adjusted layout design of a conductive feature and method of generating a simulation model of a predefined fabrication processHO CHIA-MING·Filed 2012·Granted Nov 11, 2014·414 cites·20 claims
- 0497US8448100B1Tool and method for eliminating multi-patterning conflictsLIN HUNG LUNG·Filed 2012·Granted May 21, 2013·102 cites·18 claims
- 0596US9335624B2Multi-patterning system and method using pre-coloring or locked patternsTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2014·Granted May 10, 2016·17 cites·19 claims
- 0696US8473873B2Multi-patterning methodHSU CHIN-CHANG·Filed 2011·Granted Jun 25, 2013·17 cites·20 claims
- 0796US8468470B2Multi-patterning methodHSU CHIN-CHANG·Filed 2011·Granted Jun 18, 2013·18 cites·22 claims
- 0895US8775977B2Decomposition and marking of semiconductor device design layout in double patterning lithographyHSU CHIN-CHANG·Filed 2011·Granted Jul 8, 2014·13 cites·17 claims
- 0994US12002776B2Interconnect structure and method for forming the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2022·Granted Jun 4, 2024·2 cites·20 claims
- 1094US8732628B1Method and system for photomask assignment for double patterning technologyTAIWAN SEMICONDUCTOR MFG·Filed 2013·Granted May 20, 2014·24 cites·20 claims
- 1194US8601416B2Method of circuit design yield analysisKUO CHIN-CHENG·Filed 2012·Granted Dec 3, 2013·52 cites·22 claims
- 1294US8434043B1Methodology for analysis and fixing guidance of pre-coloring layoutHSU CHIN-CHANG·Filed 2012·Granted Apr 30, 2013·31 cites·20 claims
- 1394US8327301B2Routing method for double patterning designCHENG YI-KAN·Filed 2009·Granted Dec 4, 2012·22 cites·28 claims
- 1494US8119310B1Mask-shift-aware RC extraction for double patterning designLU LEE-CHUNG·Filed 2010·Granted Feb 21, 2012·11 cites·20 claims
- 1593US11030372B2Method for generating layout diagram including cell having pin patterns and semiconductor device based on sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2019·Granted Jun 8, 2021·6 cites·20 claims
- 1693US9026971B1Multi-patterning conflict free integrated circuit designTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2014·Granted May 5, 2015·26 cites·20 claims
- 1793US8255837B2Methods for cell boundary isolation in double patterning designLU LEE-CHUNG·Filed 2009·Granted Aug 28, 2012·19 cites·20 claims
- 1892US8813016B1Multiple via connections using connectivity ringsTAIWAN SEMICONDUCTOR MFG·Filed 2013·Granted Aug 19, 2014·15 cites·20 claims
- 1991US8448120B2RC extraction for single patterning spacer techniqueHUANG CHENG-I·Filed 2011·Granted May 21, 2013·25 cites·18 claims
- 2091US8239806B2Routing system and method for double patterning technologyCHEN HUANG-YU·Filed 2009·Granted Aug 7, 2012·27 cites·19 claims
- 2190US11769766B2Integrated circuit with mixed row heightsTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2022·Granted Sep 26, 2023·1 cites·20 claims
- 2290US11387177B2Package structure and method for forming the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2019·Granted Jul 12, 2022·8 cites·20 claims
- 2390US8621409B2System and method for reducing layout-dependent effectsLEE HUI YU·Filed 2012·Granted Dec 31, 2013·18 cites·20 claims
- 2490US8252489B2Mask-shift-aware RC extraction for double patterning designSU KE-YING·Filed 2011·Granted Aug 28, 2012·7 cites·20 claims
- 2589US12261116B2Backside signal routingTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2022·Granted Mar 25, 2025·1 cites·20 claims
- 2689US11088084B2Electromagnetic shielding metal-insulator-metal capacitor structureTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2020·Granted Aug 10, 2021·2 cites·20 claims
- 2788US11532580B2Interconnect structure, semiconductor structure including interconnect structure and method for forming the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2020·Granted Dec 20, 2022·2 cites·20 claims
- 2888US10396063B2Circuit with combined cells and method for manufacturing the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2016·Granted Aug 27, 2019·7 cites·8 claims
- 2988US8707230B1Method and system for semiconductor simulationTAIWAN SEMICONDUCTOR MFG·Filed 2013·Granted Apr 22, 2014·11 cites·20 claims
- 3088US8001494B2Table-based DFM for accurate post-layout analysisTAIWAN SEMICONDUCTOR MFG·Filed 2008·Granted Aug 16, 2011·16 cites·20 claims
- 3187US11574107B2Method for manufacturing a cell having pins and semiconductor device based on sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2021·Granted Feb 7, 2023·1 cites·20 claims
- 3287US10741539B2Standard cells and variations thereof within a standard cell libraryTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2017·Granted Aug 11, 2020·4 cites·18 claims
- 3387US8645877B2Multi-patterning methodTAIWAN SEMICONDUCTOR MFG·Filed 2013·Granted Feb 4, 2014·4 cites·20 claims
- 3487US8245174B2Double patterning friendly lithography method and systemCHENG YI-KAN·Filed 2009·Granted Aug 14, 2012·17 cites·20 claims
- 3587US8037575B2Method for shape and timing equivalent dimension extractionTAIWAN SEMICONDUCTOR MFG·Filed 2008·Granted Oct 18, 2011·17 cites·18 claims
- 3686US8631366B2Integrated circuit design using DFM-enhanced architectureHOU YUNG-CHIN·Filed 2010·Granted Jan 14, 2014·10 cites·33 claims
- 3784US9262558B2RC extraction for single patterning spacer techniqueTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2013·Granted Feb 16, 2016·3 cites·20 claims
- 3884US8977991B2Method and system for replacing a pattern in a layoutTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2013·Granted Mar 10, 2015·6 cites·20 claims
- 3984US8904337B2Semiconductor device design method, system and computer-readable mediumTAIWAN SEMICONDUCTOR MFG·Filed 2014·Granted Dec 2, 2014·9 cites·20 claims
- 4084US8893066B2Parasitic component library and method for efficient circuit design and simulation using the sameTAIWAN SEMICONDUCTOR MFG·Filed 2012·Granted Nov 18, 2014·7 cites·19 claims
- 4183US9122833B2Method of designing fin field effect transistor (FinFET)-based circuit and system for implementing the sameTAIWAN SEMICONDUCTOR MFG·Filed 2013·Granted Sep 1, 2015·7 cites·20 claims
- 4283US8601408B2Method and system for replacing a pattern in a layoutCHEN HUANG-YU·Filed 2011·Granted Dec 3, 2013·6 cites·19 claims
- 4382US12230624B2Integrated circuit with mixed row heightsTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2023·Granted Feb 18, 2025·0 cites·20 claims
- 4482US11410929B2Semiconductor device and method of manufactureTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2019·Granted Aug 9, 2022·2 cites·20 claims
- 4582US10665550B2Electromagnetic shielding metal-insulator-metal capacitor structureTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2018·Granted May 26, 2020·2 cites·20 claims
- 4682US9317650B2Double patterning technology (DPT) layout routingTAIWAN SEMICONDUCTOR MFG·Filed 2014·Granted Apr 19, 2016·5 cites·20 claims
- 4782US8453095B2Systems and methods for creating frequency-dependent netlistSU KE-YING·Filed 2011·Granted May 28, 2013·7 cites·20 claims
- 4882US2024296272A1Method for manufacturing a cell having pins and semiconductor device based on sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2024·Application pending·0 cites
- 4982US2025366100A1Semiconductor devices and methods of manufacturing thereofTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2025·Application pending·0 cites
- 5082US2024387377A1Semiconductor device and method of manufactureTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2024·Application pending·0 cites
Showing the top 50 of 150 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →