Inventor · disambiguated record
Yi-Ting Fu
Also filed as: FU YI-TING
9 granted patents·4 pending applications·16 citations·filing 2018–2025
83Inventor score
Files withTAIWAN SEMICONDUCTOR MFG CO LTD13
Top patents by PatentIndex Score
13 records- 0195US11508623B2Local gate height tuning by CMP and dummy gate designTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2020·Granted Nov 22, 2022·3 cites·20 claims
- 0294US11817354B2Local gate height tuning by cmp and dummy gate designTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2022·Granted Nov 14, 2023·2 cites·20 claims
- 0394US11107902B2Dielectric spacer to prevent contacting shortingTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2018·Granted Aug 31, 2021·8 cites·20 claims
- 0485US11342444B2Dielectric spacer to prevent contacting shortingTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2019·Granted May 24, 2022·2 cites·20 claims
- 0584US11652106B2Semiconductor device and method for making the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2021·Granted May 16, 2023·1 cites·20 claims
- 0683US12243782B2Local gate height tuning by CMP and dummy gate designTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2023·Granted Mar 4, 2025·0 cites·20 claims
- 0783US2024347623A1Dielectric spacer to prevent contacting shortingTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2024·Application pending·0 cites
- 0879US12051735B2Dielectric spacer to prevent contacting shortingTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2022·Granted Jul 30, 2024·0 cites·20 claims
- 0978US2024387551A1Semiconductor device and method for making the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2024·Application pending·0 cites
- 1078US2025204017A1Local Gate Height Tuning by CMP And Dummy Gate DesignTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2025·Application pending·0 cites
- 1176US12142608B2Semiconductor device and method for making the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2023·Granted Nov 12, 2024·0 cites·20 claims
- 1274US2025308903A1Gate Cut Feature in Semiconductor Devices and Methods of Fabricating the SameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2025·Application pending·0 cites
- 1368US12406848B2Method of fabricating a gate cut feature for multi-gate semiconductor devicesTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2022·Granted Sep 2, 2025·0 cites·20 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →