Inventor · disambiguated record
Yi-Huang Wu
Also filed as: WU YI-HUANG
8 granted patents·21 citations·filing 1996–2024
81Inventor score
Top patents by PatentIndex Score
8 records- 0184US12349599B2Memory device having resistance switching layer and integrated circuit device having resistance switching layerTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2024·Granted Jul 1, 2025·0 cites·20 claims
- 0276US11963460B2Method for manufacturing memory device having resistance switching layerTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2022·Granted Apr 16, 2024·0 cites·20 claims
- 0369US8741726B2Reacted layer for improving thickness uniformity of strained structuresLIN CHENG-TE·Filed 2011·Granted Jun 3, 2014·2 cites·20 claims
- 0462US11362267B2Memory device having resistance switching element surrounding top electrode and integrated circuit device including the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2019·Granted Jun 14, 2022·0 cites·20 claims
- 0562US10163727B2MOS devices with thinned gate spacers and methods of thinning the gate spacersTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2015·Granted Dec 25, 2018·1 cites·20 claims
- 0659US9153690B2MOS devices with modulated performance and methods for forming the sameWANG JELIN·Filed 2012·Granted Oct 6, 2015·2 cites·14 claims
- 0739US5705437ATrench free process for SRAMTAIWAN SEMICONDUCTOR MFG·Filed 1996·Granted Jan 6, 1998·10 cites·22 claims
- 0833US5903035AOuter buried contact region connecting drain region to inner buried contact regionTAIWAN SEMICONDUCTOR MFG·Filed 1997·Granted May 11, 1999·6 cites·20 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →