Inventor · disambiguated record
Yoshiharu Aimoto
Also filed as: AIMOTO YOSHIHARU
11 granted patents·249 citations·filing 1994–2005
91Inventor score
Top patents by PatentIndex Score
11 records- 0187US5463591ADual port memory having a plurality of memory cell arrays for a high-speed operationNEC CORP·Filed 1994·Granted Oct 31, 1995·66 cites·7 claims
- 0284US6263413B1Memory integrated circuit and main memory and graphics memory systems applying the aboveNEC CORP·Filed 1998·Granted Jul 17, 2001·117 cites·19 claims
- 0380US7248533B2Semiconductor circuit apparatus with power save modeNEC ELECTRONICS CORP·Filed 2005·Granted Jul 24, 2007·11 cites·16 claims
- 0459US6359825B1Dynamic memory with increased access speed and reduced chip areaNEC CORP·Filed 1999·Granted Mar 19, 2002·18 cites·12 claims
- 0551US6034911ASemiconductor memory device for a rapid random accessNEC CORP·Filed 1996·Granted Mar 7, 2000·14 cites·7 claims
- 0648US6212120B1Semiconductor memory device with less power consumptionNEC CORP·Filed 2000·Granted Apr 3, 2001·6 cites·21 claims
- 0747US7366821B2High-speed memory systemNEC CORP·Filed 2001·Granted Apr 29, 2008·5 cites·9 claims
- 0834US5845312ASystem for accessing dynamic random access memory where the logic/control circuit temporarily stops upon word line switchingNEC CORP·Filed 1996·Granted Dec 1, 1998·4 cites·13 claims
- 0934US5714893ASignal transmission circuitNEC CORP·Filed 1996·Granted Feb 3, 1998·4 cites·3 claims
- 1031US5815442AData transfer apparatus with large noise margin and reduced power dissipationNEC CORP·Filed 1996·Granted Sep 29, 1998·2 cites·19 claims
- 1130US5521877ASerial random access memory device capable of reducing peak current through subword data registerNEC CORP·Filed 1994·Granted May 28, 1996·2 cites·4 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →