Inventor · disambiguated record
Yoshinori Haraguchi
Also filed as: HARAGUCHI YOSHINORI
11 granted patents·3 pending applications·490 citations·filing 1993–2014
90Inventor score
Top patents by PatentIndex Score
14 records- 0198US7796453B2Semiconductor deviceELPIDA MEMORY INC·Filed 2008·Granted Sep 14, 2010·410 cites·17 claims
- 0270US8886893B2Semiconductor deviceMIURA SEIJI·Filed 2008·Granted Nov 11, 2014·4 cites·9 claims
- 0369US7864618B2Semiconductor memory deviceELPIDA MEMORY INC·Filed 2008·Granted Jan 4, 2011·7 cites·13 claims
- 0469US5553025ASemiconductor memory device executing a memory test in a plurality of test modesNEC CORP·Filed 1994·Granted Sep 3, 1996·30 cites·8 claims
- 0567US8581758B2Semiconductor device, method for controlling the same, and data processing system including semiconductor deviceTeramoto yuki·Filed 2010·Granted Nov 12, 2013·5 cites·27 claims
- 0657US9030895B2Memory device with pin register to set input/output direction and bitwidth of data signalsMIURA SEIJI·Filed 2009·Granted May 12, 2015·2 cites·16 claims
- 0756US8674720B2Semiconductor device and method of adjusting an impedance of an output bufferHARAGUCHI YOSHINORI·Filed 2012·Granted Mar 18, 2014·2 cites·14 claims
- 0856US7023422B2Cell accommodating portion structureTANITA SEISAKUSHO KK·Filed 2003·Granted Apr 4, 2006·5 cites·2 claims
- 0950US7280380B2Semiconductor memory device and method of making design change to semiconductor chipELPIDA MEMORY INC·Filed 2005·Granted Oct 9, 2007·2 cites·11 claims
- 1049US5381371ASemiconductor memory device incorporating redundancy memory cells capable of accessing defective memory cellsNEC CORP·Filed 1993·Granted Jan 10, 1995·13 cites·6 claims
- 1145US6034907ASemiconductor integrated circuit device with built-in test circuit for applying stress to timing generator in burn-in testNEC CORP·Filed 1999·Granted Mar 7, 2000·10 cites·11 claims
- 1245US2015092490A1Semiconductor devicePS4 LUXCO SARL·Filed 2014·Application pending·0 cites
- 1341US2001051327A1Device for supporting training for prevention against incontinence of urineTANITA SEISAKUSHO KK·Filed 2001·Application pending·0 cites
- 1429US2007271409A1Memory module, memory system, and data processing systemMIURA SEIJI·Filed 2007·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →