Inventor · disambiguated record
Yoichi Iizuka
Also filed as: IIZUKA YOICHI
26 granted patents·173 citations·filing 1998–2023
96Inventor score
Top patents by PatentIndex Score
26 records- 0195US7999572B2Semiconductor integrated circuitRENESAS ELECTRONICS CORP·Filed 2010·Granted Aug 16, 2011·24 cites·6 claims
- 0291US8552758B2Semiconductor integrated circuit with data transmitting and receiving circuitsKOMYO MASAYASU·Filed 2012·Granted Oct 8, 2013·9 cites·3 claims
- 0390US8907699B2Semiconductor integrated circuitRENESAS ELECTRONICS CORP·Filed 2014·Granted Dec 9, 2014·9 cites·9 claims
- 0490US7567880B2Interface circuitNEC ELECTRONICS CORP·Filed 2007·Granted Jul 28, 2009·21 cites·17 claims
- 0589US8653851B2Semiconductor integrated circuitKOMYO MASAYASU·Filed 2011·Granted Feb 18, 2014·10 cites·11 claims
- 0689US7956638B2Impedance adjusting circuitRENESAS ELECTRONICS CORP·Filed 2010·Granted Jun 7, 2011·10 cites·3 claims
- 0786US8102186B2Semiconductor integrated circuit with first and second transmitter-receiversKOMYO MASAYASU·Filed 2010·Granted Jan 24, 2012·5 cites·11 claims
- 0884US12040813B2Integrating analog-to-digital converter and semiconductor deviceRENESAS ELECTRONICS CORP·Filed 2022·Granted Jul 16, 2024·1 cites·9 claims
- 0984US8253436B2Semiconductor integrated circuit with data transmitting and receiving circuitsKOMYO MASAYASU·Filed 2010·Granted Aug 28, 2012·5 cites·5 claims
- 1083US7345602B2Pre-emphasis circuitNEC ELECTRONICS CORP·Filed 2006·Granted Mar 18, 2008·18 cites·8 claims
- 1183US6489808B2Buffer circuit capable of carrying out interface with a high speedNEC CORP·Filed 2002·Granted Dec 3, 2002·28 cites·3 claims
- 1282US9286958B2Memory with termination circuitRENESAS ELECTRONICS CORP·Filed 2014·Granted Mar 15, 2016·4 cites·9 claims
- 1376US8717113B2Oscillator and semiconductor integrated circuit deviceIIZUKA YOICHI·Filed 2012·Granted May 6, 2014·5 cites·14 claims
- 1472US7586955B2Interface circuit and semiconductor deviceNEC ELECTRONICS CORP·Filed 2006·Granted Sep 8, 2009·8 cites·13 claims
- 1570US9344034B2Oscillator and semiconductor integrated circuit deviceRENESAS ELECTRONICS CORP·Filed 2014·Granted May 17, 2016·2 cites·8 claims
- 1664US11115614B2Image sensor with A/D conversion circuit having reduced DNL deteriorationRENESAS ELECTRONICS CORP·Filed 2019·Granted Sep 7, 2021·1 cites·11 claims
- 1762US8952719B2Memory with termination circuitRENESAS ELECTRONICS CORP·Filed 2013·Granted Feb 10, 2015·1 cites·14 claims
- 1861US10490254B2Semiconductor integrated circuit system with termination circuitRENESAS ELECTRONICS CORP·Filed 2018·Granted Nov 26, 2019·0 cites·10 claims
- 1959US9171592B2Semiconductor integrate circuitRENESAS ELECTRONICS CORP·Filed 2014·Granted Oct 27, 2015·0 cites·7 claims
- 2058US10134462B2Memory with termination circuitRENESAS ELECTRONICS CORP·Filed 2017·Granted Nov 20, 2018·0 cites·9 claims
- 2151US9208877B2Semiconductor integrated circuit with data transmitting and receiving circuitsRENESAS ELECTRONICS CORP·Filed 2013·Granted Dec 8, 2015·0 cites·5 claims
- 2250US12452559B2Solid-state image sensor, imaging device, and AD converterRENESAS ELECTRONICS CORP·Filed 2023·Granted Oct 21, 2025·0 cites·9 claims
- 2350US9767884B2Memory with termination circuitRENESAS ELECTRONICS CORP·Filed 2016·Granted Sep 19, 2017·0 cites·9 claims
- 2448US9673818B2Semiconductor integrated circuit with data transmitting and receiving circuitsRENESAS ELECTRONICS CORP·Filed 2015·Granted Jun 6, 2017·0 cites·7 claims
- 2548US8558572B2Memory with termination circuitKOMYO MASAYASU·Filed 2011·Granted Oct 15, 2013·0 cites·19 claims
- 2648US6006348AFlip flop circuit for scan test with two latch circuitsNEC CORP·Filed 1998·Granted Dec 21, 1999·12 cites·6 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →