Inventor · disambiguated record
Yoshinori Rokugo
Also filed as: ROKUGO YOSHINORI
14 granted patents·1 pending application·168 citations·filing 1981–2005
92Inventor score
Top patents by PatentIndex Score
15 records- 0180US4397017AStuff synchronization device with reduced sampling jitterNIPPON ELECTRIC CO·Filed 1981·Granted Aug 2, 1983·34 cites·8 claims
- 0275US6947427B1Transmission method and network system for accommodating a plurality of kinds of traffic in a common networkNEC CORP·Filed 2000·Granted Sep 20, 2005·22 cites·31 claims
- 0361US4935921ACross-connection network using time switchNEC CORP·Filed 1987·Granted Jun 19, 1990·27 cites·14 claims
- 0459US4803680ADestuffing circuit with a digital phase-locked loopNEC CORP·Filed 1986·Granted Feb 7, 1989·16 cites·6 claims
- 0547US7782865B2Allocating VPI for user devicesJUNIPER NETWORKS INC·Filed 2005·Granted Aug 24, 2010·0 cites·19 claims
- 0647US5642357ATransmission signal processing circuit which can determine an optimum stuff threshold value corresponding to a sort of a tributary unit of an input signalNEC CORP·Filed 1995·Granted Jun 24, 1997·13 cites·4 claims
- 0744US6934291B1ATM network system and method for allocating VPI for user devicesJUNIPER NETWORKS INC·Filed 2000·Granted Aug 23, 2005·0 cites·17 claims
- 0844US5694068ADigital phase-locked loop (PLL) having multilevel phase comparatorsNEC CORP·Filed 1996·Granted Dec 2, 1997·12 cites·4 claims
- 0942US5144620ACross-connection network using time switchNEC CORP·Filed 1990·Granted Sep 1, 1992·12 cites·2 claims
- 1040US5864248APhase-locked loop circuit for reproducing clock signals synchronized with transmitter in receiverNEC CORP·Filed 1996·Granted Jan 26, 1999·9 cites·6 claims
- 1140US2002126700A1Transmission techniques using universal data link protocolFiled 2001·Application pending·0 cites
- 1239US6496553B1PLL for reproducing standard clock from random time informationNEC CORP·Filed 1998·Granted Dec 17, 2002·7 cites·17 claims
- 1337US4727542AHigher-order multiplex digital communication system with identification patterns specific to lower-order multiplex digital signalsNEC CORP·Filed 1987·Granted Feb 23, 1988·6 cites·6 claims
- 1436US5604774AFully secondary DPLL and destuffing circuit employing sameNEC CORP·Filed 1995·Granted Feb 18, 1997·7 cites·4 claims
- 1531US5715286ADigital phase synchronous circuit and data receiving circuit including the sameNEC CORP·Filed 1996·Granted Feb 3, 1998·3 cites·16 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →