Inventor · disambiguated record
Yongjiang Wang
Also filed as: WANG YONGJIANG
9 granted patents·1 pending application·48 citations·filing 2000–2014
85Inventor score
Top patents by PatentIndex Score
10 records- 0186US9262318B1Serial flash XIP with caching mechanism for fast program execution in embedded systemsMARVELL INT LTD·Filed 2014·Granted Feb 16, 2016·22 cites·14 claims
- 0286US8862954B1Integrated circuit scan testing with stop-clock and auto-step featuresWANG YONGJIANG·Filed 2011·Granted Oct 14, 2014·7 cites·24 claims
- 0382US8954622B1Embedded programmable logic for logic stacking on application processorWANG YONGJIANG·Filed 2012·Granted Feb 10, 2015·7 cites·12 claims
- 0475US8198925B1Digital power on resetWANG YONGJIANG·Filed 2009·Granted Jun 12, 2012·7 cites·15 claims
- 0565US7750474B1Metal programmable logic and multiple function pin interfaceMARVELL INT LTD·Filed 2008·Granted Jul 6, 2010·3 cites·12 claims
- 0663US8627155B1Integrated circuit testing with clock manipulation and auto-step featuresWANG YONGJIANG·Filed 2011·Granted Jan 7, 2014·1 cites·18 claims
- 0761US8810289B1Digital power on resetWANG YONGJIANG·Filed 2012·Granted Aug 19, 2014·1 cites·13 claims
- 0855US9157962B1Apparatus and method for testing a scan chain including modifying a first clock signal to simulate high-frequency operation associated with a second clock signalMARVELL INT LTD·Filed 2014·Granted Oct 13, 2015·0 cites·21 claims
- 0944US8299618B2Metal programmable logic and multiple function pin interfaceWANG YONGJIANG·Filed 2010·Granted Oct 30, 2012·0 cites·16 claims
- 1039US2002078412A1Built-in self test for a programmable logic device using linear feedback shift registers and hierarchical signature generationFiled 2000·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →