Inventor · disambiguated record
Yuan-Ju Chao
Also filed as: CHAO YUAN · CHAO YUAN-JU
30 granted patents·2 pending applications·126 citations·filing 2004–2024
95Inventor score
Files withCHAO YUAN JU18IPGREAT INCORPORATED7MARVELL INT LTD3KERAMAT MANSOUR2ADVANCED MICRO DEVICES PRODUCTS (CHINA) CO LTD1
Top patents by PatentIndex Score
32 records- 0195US9774337B1High speed SAR ADC using comparator output triggered binary-search timing scheme and bit-dependent DAC settlingCHAO YUAN-JU·Filed 2017·Granted Sep 26, 2017·16 cites·16 claims
- 0293US9979382B1Programmable duty-cycle low jitter differential clock bufferCHAO YUAN JU·Filed 2017·Granted May 22, 2018·11 cites·10 claims
- 0392US10715163B2Method of capacitive DAC calibration for SAR ADCIPGREAT INCORPORATED·Filed 2019·Granted Jul 14, 2020·9 cites·20 claims
- 0491US10523228B1Method of capacitive DAC calibration for SAR ADCIPGREAT INCORPORATED·Filed 2018·Granted Dec 31, 2019·9 cites·20 claims
- 0589US7808322B1System and method for modifying output power of an information communication systemMARVELL INT LTD·Filed 2007·Granted Oct 5, 2010·13 cites·21 claims
- 0688US9843336B1System and method of minimizing differential non-linearity (DNL) for high resolution current steering DACCHAO YUAN-JU·Filed 2017·Granted Dec 12, 2017·7 cites·10 claims
- 0788US7167045B1System and method for modifying output power of an information communication systemMARVELL INT LTD·Filed 2004·Granted Jan 23, 2007·28 cites·59 claims
- 0887US9418788B2Precision half cell for sub-FEMTO unit cap and capacitive DAC architecture in SAR ADCAPPLE INC·Filed 2015·Granted Aug 16, 2016·4 cites·20 claims
- 0986US11637561B2Method of data conversion for computing-in-memoryCHAO YUAN JU·Filed 2020·Granted Apr 25, 2023·2 cites·18 claims
- 1085US10505559B1Process, voltage and temperature optimized asynchronous SAR ADCIPGREAT INCORPORATED·Filed 2018·Granted Dec 10, 2019·5 cites·18 claims
- 1181US9813075B1Apparatus and method of self-healing data convertersCHAO YUAN-JU·Filed 2017·Granted Nov 7, 2017·4 cites·17 claims
- 1277US9866236B1Appapatus and method for fast conversion, compact, ultra low power, wide supply range auxiliary digital to analog convertersCHAO YUAN-JU·Filed 2017·Granted Jan 9, 2018·3 cites·16 claims
- 1374US10938399B1Digital corrected two-step SAR ADCCHAO YUAN JU·Filed 2020·Granted Mar 2, 2021·2 cites·20 claims
- 1470US9667263B1Apparatus and method of self-healing data convertersCHAO YUAN-JU·Filed 2016·Granted May 30, 2017·2 cites·17 claims
- 1570US9621180B1Apparatus and method for fast conversion, compact, ultra low power, wide supply range auxiliary digital to analog convertersCHAO YUAN-JU·Filed 2016·Granted Apr 11, 2017·2 cites·14 claims
- 1666US10644713B1Process, voltage and temperature optimized asynchronous SAR ADCIPGREAT INCORPORATED·Filed 2019·Granted May 5, 2020·1 cites·18 claims
- 1765US12334949B2Single-end input configurable differential SAR analog-to-digital converterCHAO YUAN JU·Filed 2023·Granted Jun 17, 2025·0 cites·20 claims
- 1864US11245412B2SAR ADC using value shifted capacitive DAC for improved reference settling and higher conversion rateIPGREAT INCORPORATED·Filed 2018·Granted Feb 8, 2022·1 cites·20 claims
- 1963US12413237B2Charge-injection SAR ADC for correcting full scale PVT variationCHAO YUAN JU·Filed 2024·Granted Sep 9, 2025·0 cites·16 claims
- 2063US10128860B1High speed SAR ADC using comparator output triggered binary-search timing scheme and bit-dependent DAC settlingCHAO YUAN JU·Filed 2017·Granted Nov 13, 2018·1 cites·16 claims
- 2162US7733076B1Dual reference current generation using a single external reference resistorMARVELL INT LTD·Filed 2005·Granted Jun 8, 2010·5 cites·26 claims
- 2261US11652490B1Apparatus and method of enhancing linearity and expanding output amplitude for current-steering digital-to-analog converters (DAC)CHAO YUAN JU·Filed 2021·Granted May 16, 2023·0 cites·20 claims
- 2360US12273121B2Apparatus and method of reference-free SAR analog-to-digital conversionCHAO YUAN JU·Filed 2022·Granted Apr 8, 2025·0 cites·16 claims
- 2456US2025217566A1System and method utilizing machine learning (ml) for analog and mixed-signal circuit layout synthesisCHAO YUAN JU·Filed 2023·Application pending·0 cites
- 2556US2025200263A1Apparatus and method of analog and mixed-signal circuit layout automationCHAO YUAN JU·Filed 2023·Application pending·0 cites
- 2655US12487282B2On-chip distribution of test data for multiple diesADVANCED MICRO DEVICES PRODUCTS CHINA CO LTD·Filed 2021·Granted Dec 2, 2025·0 cites·20 claims
- 2751US10873339B1On-chip pattern generator for high speed digital-to-analog converterCHAO YUAN JU·Filed 2019·Granted Dec 22, 2020·0 cites·19 claims
- 2850US8610612B2Tree structured supply and bias distribution layoutKERAMAT MANSOUR·Filed 2012·Granted Dec 17, 2013·1 cites·18 claims
- 2947US10460061B2System and method for anti reverse engineering for analog integrated circuitIPGREAT INCORPORATED·Filed 2017·Granted Oct 29, 2019·0 cites·20 claims
- 3047US10014874B1System and method of minimizing differential non-linearity (DNL) for high resolution current steering DACCHAO YUAN JU·Filed 2017·Granted Jul 3, 2018·0 cites·11 claims
- 3145US10686459B2Programmable gain amplifier (PGA) embedded pipelined analog to digital converters (ADC) for wide input full scale rangeIPGREAT INCORPORATED·Filed 2018·Granted Jun 16, 2020·0 cites·6 claims
- 3240US8537040B2Data converter current sources using thin-oxide core devicesKERAMAT MANSOUR·Filed 2011·Granted Sep 17, 2013·0 cites·21 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →