Inventor · disambiguated record
Yuanning Chen
Also filed as: CHEN YUANNING
17 granted patents·9 pending applications·92 citations·filing 1999–2019
92Inventor score
Files withTEXAS INSTRUMENTS INC8CHEN YUANNING7AGERE SYSTEMS INC6AGERE SYST GUARDIAN CORP3MICROSOL TECH INC1
Top patents by PatentIndex Score
26 records- 0183US8552470B2Self-powered integrated circuit with multi-junction photovoltaic cellCHEN YUANNING·Filed 2011·Granted Oct 8, 2013·7 cites·3 claims
- 0280US6551946B1Two-step oxidation process for oxidizing a silicon substrate wherein the first step is carried out at a temperature below the viscoelastic temperature of silicon dioxide and the second step is carried out at a temperature above the viscoelastic temperatureAGERE SYSTEMS INC·Filed 2000·Granted Apr 22, 2003·26 cites·10 claims
- 0373US7704883B2Annealing to improve edge roughness in semiconductor technologyTEXAS INSTRUMENTS INC·Filed 2006·Granted Apr 27, 2010·4 cites·13 claims
- 0472US9048151B2Self-powered integrated circuit with photovoltaic cellCHEN YUANNING·Filed 2011·Granted Jun 2, 2015·4 cites·12 claims
- 0572US6541394B1Method of making a graded grown, high quality oxide layer for a semiconductor deviceAGERE SYST GUARDIAN CORP·Filed 2000·Granted Apr 1, 2003·15 cites·33 claims
- 0670US8883541B2Self-powered integrated circuit with multi-junction photovoltaic cellTEXAS INSTRUMENTS INC·Filed 2013·Granted Nov 11, 2014·2 cites·4 claims
- 0763US6492712B1High quality oxide for use in integrated circuitsAGERE SYST GUARDIAN CORP·Filed 2000·Granted Dec 10, 2002·8 cites·15 claims
- 0860US11004612B2Low temperature sub-nanometer periodic stack dielectricsMICROSOL TECH INC·Filed 2019·Granted May 11, 2021·1 cites·8 claims
- 0960US7569464B2Method for manufacturing a semiconductor device having improved across chip implant uniformityTEXAS INSTRUMENTS INC·Filed 2006·Granted Aug 4, 2009·2 cites·18 claims
- 1056US7800226B2Integrated circuit with metal silicide regionsAGERE SYSTEMS INC·Filed 2007·Granted Sep 21, 2010·1 cites·3 claims
- 1152US7033897B2Encapsulated spacer with low dielectric constant material to reduce the parasitic capacitance between gate and drain in CMOS technologyTEXAS INSTRUMENTS INC·Filed 2003·Granted Apr 25, 2006·5 cites·16 claims
- 1252US2007284608A1Reduction of dopant loss in a gate structureTEXAS INSTRUMENTS INC·Filed 2007·Application pending·0 cites
- 1351US6930006B2Electronic circuit structure with improved dielectric propertiesAGERE SYSTEMS INC·Filed 2002·Granted Aug 16, 2005·3 cites·6 claims
- 1447US7276408B2Reduction of dopant loss in a gate structureTEXAS INSTRUMENTS INC·Filed 2003·Granted Oct 2, 2007·1 cites·16 claims
- 1546US2006216882A1Using Oxynitride Spacer to Reduce Parasitic Capacitance in CMOS DevicesTEXAS INSTRUMENTS INC·Filed 2006·Application pending·0 cites
- 1645US7148153B2Process for oxide fabrication using oxidation steps below and above a threshold temperatureAGERE SYSTEMS INC·Filed 2002·Granted Dec 12, 2006·2 cites·26 claims
- 1743US2016094072A1Hybrid energy harvesting deviceCHEN YUANNING·Filed 2014·Application pending·0 cites
- 1840US7667275B2Using oxynitride spacer to reduce parasitic capacitance in CMOS devicesTEXAS INSTRUMENTS INC·Filed 2004·Granted Feb 23, 2010·0 cites·2 claims
- 1940US7250356B2Method for forming metal silicide regions in an integrated circuitAGERE SYSTEMS INC·Filed 2002·Granted Jul 31, 2007·1 cites·5 claims
- 2040US2005263834A1Encapsulated spacer with low dielectric constant material to reduce the parasitic capacitance between gate and drain in CMOS technologyCHEN YUANNING·Filed 2005·Application pending·0 cites
- 2139US6303397B1Method for benchmarking thin film measurement toolsAGERE SYST GUARDIAN CORP·Filed 1999·Granted Oct 16, 2001·10 cites·29 claims
- 2239US2004099964A1Use of hafnium silicon oxynitride as the cap layer of the sidewall spacerFiled 2003·Application pending·0 cites
- 2338US2008251864A1Stacked poly structure to reduce the poly particle count in advanced cmos technologyCHEN YUANNING·Filed 2007·Application pending·0 cites
- 2437US2003143863A1Process for oxide fabrication using oxidation steps below and above a threshold temperatureAGERE SYSTEMS INC·Filed 2003·Application pending·0 cites
- 2536US2004113206A1Use of hafnium silicon oxynitride as the cap layer of the sidewall spacerCHEN YUANNING·Filed 2003·Application pending·0 cites
- 2636US2004094782A1Use of hafnium silicon oxynitride as the cap layer of the sidewall spacerCHEN YUANNING·Filed 2002·Application pending·0 cites
Join the waitlist — get patent alerts
Get an alert when Yuanning Chen files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →