Inventor · disambiguated record
Yuan C. Chou
Also filed as: CHOU YUAN · CHOU YUAN C · CHOU YUAN-CHUNG
52 granted patents·5 pending applications·551 citations·filing 2002–2025
98Inventor score
Top patents by PatentIndex Score
57 records- 0197US8209499B2Method of read-set and write-set management by distinguishing between shared and non-shared memory regionsCHOU YUAN C·Filed 2010·Granted Jun 26, 2012·63 cites·23 claims
- 0295US7543282B2Method and apparatus for selectively executing different executable code versions which are optimized in different waysSUN MICROSYSTEMS INC·Filed 2006·Granted Jun 2, 2009·47 cites·21 claims
- 0395US7487296B1Multi-stride prefetcher with a recurring prefetch tableSUN MICROSYSTEMS INC·Filed 2005·Granted Feb 3, 2009·53 cites·39 claims
- 0493US10013356B2Facilitating prefetching for data streams with multiple stridesORACLE INT CORP·Filed 2015·Granted Jul 3, 2018·11 cites·20 claims
- 0593US9009449B2Reducing power consumption and resource utilization during miss lookaheadCHOU YUAN C·Filed 2011·Granted Apr 14, 2015·23 cites·19 claims
- 0692US12045615B1Processing of synchronization barrier instructionsAPPLE INC·Filed 2022·Granted Jul 23, 2024·3 cites·20 claims
- 0791US7185338B2Processor with speculative multithreading and hardware to support multithreading softwareSUN MICROSYSTEMS INC·Filed 2002·Granted Feb 27, 2007·67 cites·3 claims
- 0890US12067398B1Shared learning table for load value prediction and load address predictionAPPLE INC·Filed 2022·Granted Aug 20, 2024·2 cites·20 claims
- 0989US7600098B1Method and system for efficient implementation of very large store bufferSUN MICROSYSTEMS INC·Filed 2006·Granted Oct 6, 2009·21 cites·11 claims
- 1089US7127592B2Method and apparatus for dynamically allocating registers in a windowed architectureSUN MICROSYSTEMS INC·Filed 2003·Granted Oct 24, 2006·57 cites·25 claims
- 1187US8429636B2Handling dependency conditions between machine instructionsCHOU YUAN C·Filed 2011·Granted Apr 23, 2013·10 cites·18 claims
- 1287US7457923B1Method and structure for correlation-based prefetchingSUN MICROSYSTEMS INC·Filed 2005·Granted Nov 25, 2008·19 cites·6 claims
- 1386US11126555B2Multi-line data prefetching using dynamic prefetch depthORACLE INT CORP·Filed 2020·Granted Sep 21, 2021·2 cites·20 claims
- 1486US7650485B1Structure and method for achieving very large lookahead instruction window via non-sequential instruction fetch and issueSUN MICROSYSTEMS INC·Filed 2007·Granted Jan 19, 2010·16 cites·19 claims
- 1585US9442727B2Filtering out redundant software prefetch instructionsORACLE INT CORP·Filed 2013·Granted Sep 13, 2016·8 cites·20 claims
- 1685US8892822B2Selectively dropping prefetch requests based on prefetch accuracy informationCHOU YUAN C·Filed 2011·Granted Nov 18, 2014·8 cites·18 claims
- 1785US7793044B1Efficient caching of stores in scalable chip multi-threaded systemsORACLE AMERICA INC·Filed 2007·Granted Sep 7, 2010·15 cites·6 claims
- 1882US7529911B1Hardware-based technique for improving the effectiveness of prefetching during scout modeSUN MICROSYSTEMS INC·Filed 2005·Granted May 5, 2009·12 cites·14 claims
- 1982US7373482B1Software-based technique for improving the effectiveness of prefetching during scout modeSUN MICROSYSTEMS INC·Filed 2005·Granted May 13, 2008·12 cites·16 claims
- 2081US7925865B2Accuracy of correlation prefetching via block correlation and adaptive prefetch degree selectionORACLE AMERICA INC·Filed 2008·Granted Apr 12, 2011·10 cites·20 claims
- 2178US10579531B2Multi-line data prefetching using dynamic prefetch depthORACLE INT CORP·Filed 2017·Granted Mar 3, 2020·2 cites·20 claims
- 2277US7543112B1Efficient on-chip instruction and data caching for chip multiprocessorsSUN MICROSYSTEMS INC·Filed 2006·Granted Jun 2, 2009·8 cites·7 claims
- 2376US8099586B2Branch misprediction recovery mechanism for microprocessorsCHOU YUAN C·Filed 2008·Granted Jan 17, 2012·7 cites·17 claims
- 2475US10073789B2Method for load instruction speculation past older store instructionsORACLE INT CORP·Filed 2015·Granted Sep 11, 2018·2 cites·20 claims
- 2575US9690707B2Correlation-based instruction prefetchingCHOU YUAN C·Filed 2010·Granted Jun 27, 2017·4 cites·16 claims
- 2675US7475230B2Method and apparatus for performing register file checkpointing to support speculative execution within a processorSUN MICROSYSTEMS INC·Filed 2003·Granted Jan 6, 2009·21 cites·21 claims
- 2775US7340567B1Value prediction for missing read operations instancesSUN MICROSYSTEMS INC·Filed 2004·Granted Mar 4, 2008·19 cites·97 claims
- 2873US8918626B2Prefetching load data in lookahead mode and invalidating architectural registers instead of writing results for retiring instructionsCHOU YUAN C·Filed 2011·Granted Dec 23, 2014·3 cites·16 claims
- 2973US2025278277A1Re-use of Speculative Control Transfer Instruction Results from Wrong PathAPPLE INC·Filed 2025·Application pending·0 cites
- 3072US2024362027A1Shared Learning Table for Load Value Prediction and Load Address PredictionAPPLE INC·Filed 2024·Application pending·0 cites
- 3171US10296460B2Prefetch bandwidth throttling by dynamically adjusting miss buffer prefetch-dropping thresholdsORACLE INT CORP·Filed 2016·Granted May 21, 2019·2 cites·18 claims
- 3271US9047197B2Non-coherent store instruction for fast inter-strand data communication for processors with write-through L1 cachesCHOU YUAN C·Filed 2007·Granted Jun 2, 2015·5 cites·18 claims
- 3371US2024329990A1Processing of Synchronization Barrier InstructionsAPPLE INC·Filed 2024·Application pending·0 cites
- 3470US10474578B2Utilization-based throttling of hardware prefetchersORACLE INT CORP·Filed 2017·Granted Nov 12, 2019·1 cites·20 claims
- 3569US9946543B2Processor efficiency by combining working and architectural register filesORACLE INT CORP·Filed 2016·Granted Apr 17, 2018·1 cites·20 claims
- 3668US12321751B2Re-use of speculative control transfer instruction results from wrong pathAPPLE INC·Filed 2023·Granted Jun 3, 2025·0 cites·20 claims
- 3768US9256541B2Dynamically adjusting the hardware stream prefetcher prefetch ahead distanceORACLE INT CORP·Filed 2014·Granted Feb 9, 2016·3 cites·20 claims
- 3867US9665375B2Mitigation of thread hogs on a threaded processor and prevention of allocation of resources to one or more instructions following a load missCHOU YUAN C·Filed 2012·Granted May 30, 2017·2 cites·14 claims
- 3966US9304927B2Adaptive stride prefetcherDURBHAKULA SURYANARAYANA MURTHY·Filed 2012·Granted Apr 5, 2016·4 cites·17 claims
- 4064US11099849B2Method for reducing fetch cycles for return-type instructionsORACLE INT CORP·Filed 2016·Granted Aug 24, 2021·1 cites·20 claims
- 4163US8458444B2Apparatus and method for handling dependency conditions between floating-point instructionsCHOU YUAN C·Filed 2009·Granted Jun 4, 2013·2 cites·18 claims
- 4261US8504805B2Processor operating mode for mitigating dependency conditions between instructions having different operand sizesGOLLA ROBERT T·Filed 2009·Granted Aug 6, 2013·2 cites·16 claims
- 4360US12159142B1Managing table accesses for tagged geometric length (TAGE) load value predictionAPPLE INC·Filed 2023·Granted Dec 3, 2024·0 cites·20 claims
- 4457US12175248B2Re-use of speculative load instruction results from wrong pathAPPLE INC·Filed 2023·Granted Dec 24, 2024·0 cites·20 claims
- 4555US9367312B2Processor efficiency by combining working and architectural register filesORACLE INT CORP·Filed 2014·Granted Jun 14, 2016·0 cites·20 claims
- 4654US11829763B2Early load execution via constant address and stride predictionAPPLE INC·Filed 2019·Granted Nov 28, 2023·0 cites·20 claims
- 4752US7984265B2Event address register history buffers for supporting profile-guided and dynamic optimizationsORACLE AMERICA INC·Filed 2008·Granted Jul 19, 2011·0 cites·12 claims
- 4851US8086804B2Method and system for optimizing processor performance by regulating issue of pre-fetches to hot cache setsCHOU YUAN C·Filed 2008·Granted Dec 27, 2011·0 cites·15 claims
- 4949US9535697B2Register window performance via lazy register fillsORACLE INT CORP·Filed 2013·Granted Jan 3, 2017·0 cites·16 claims
- 5047US10747540B2Hybrid lookahead branch target cacheORACLE INT CORP·Filed 2016·Granted Aug 18, 2020·0 cites·20 claims
Showing the top 50 of 57 patent records by PatentIndex Score.
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →