Inventor · disambiguated record
Yukun Lv
Also filed as: LV YUKUN
8 granted patents·1 pending application·9 citations·filing 2010–2016
77Inventor score
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9 records- 0178US9991116B1Method for forming high aspect ratio patterning structureSHANGHAI HUALI MICROELECT CORP·Filed 2016·Granted Jun 5, 2018·3 cites·10 claims
- 0278US9842743B1Method of etching a shallow trenchSHANGHAI HUALI MICROELECT CORP·Filed 2016·Granted Dec 12, 2017·3 cites·9 claims
- 0363US8674480B2High voltage bipolar transistor with pseudo buried layersCHIU TZUYIN·Filed 2010·Granted Mar 18, 2014·2 cites·9 claims
- 0459US8900887B2Method for etching polysilicon gateSHANGHAI HUALI MICROELECT CORP·Filed 2012·Granted Dec 2, 2014·1 cites·4 claims
- 0539US10083266B2Simulation method of CMP processSHANGHAI HUALI MICROELECT CORP·Filed 2016·Granted Sep 25, 2018·0 cites·14 claims
- 0639US8658502B2Method for reducing morphological difference between N-doped and undoped polysilicon gates after etchingSHANGHAI HUALI MICROELECT CORP·Filed 2012·Granted Feb 25, 2014·0 cites·4 claims
- 0736US9871064B1Method for forming shallow trenches of the dual active regionsSHANGHAI HUALI MICROELECT CORP·Filed 2016·Granted Jan 16, 2018·0 cites·9 claims
- 0833US2016291458A1Method integrating target optimization and optical proximity correctionHE DAQUAN·Filed 2015·Application pending·0 cites
- 0932US9666472B2Method for establishing mapping relation in STI etch and controlling critical dimension of STIXU JIN·Filed 2016·Granted May 30, 2017·0 cites·14 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →