Inventor · disambiguated record
Yun-Che Wang
Also filed as: WANG YUN-CHE
10 granted patents·433 citations·filing 1987–2013
91Inventor score
Top patents by PatentIndex Score
10 records- 0194US5663665AMeans for control limits for delay locked loopCYPRESS SEMICONDUCTOR CORP·Filed 1995·Granted Sep 2, 1997·121 cites·9 claims
- 0288US5387911AMethod and apparatus for transmitting and receiving both 8B/10B code and 10B/12B code in a switchable 8B/10B transmitter and receiverFiled 1992·Granted Feb 7, 1995·183 cites·12 claims
- 0371US4878028ATechnique for generating precompensation delay for writing data to disksADVANCED MICRO DEVICES INC·Filed 1987·Granted Oct 31, 1989·17 cites·17 claims
- 0461US6504849B1Fiber auto-negotiationCYPRESS SEMICONDUCTOR CORP·Filed 1997·Granted Jan 7, 2003·59 cites·16 claims
- 0557US6229811B1Architecture for a dual segment dual speed repeaterCYPRESS SEMICONDUCTOR CORP·Filed 2000·Granted May 8, 2001·4 cites·20 claims
- 0652US8857111B2Composite damperUNIV NAT CHENG KUNG·Filed 2013·Granted Oct 14, 2014·1 cites·15 claims
- 0752US5304996A8B/10B encoder providing one of pair of noncomplementary, opposite disparity codes responsive to running disparity and selected commandsADVANCED MICRO DEVICES INC·Filed 1992·Granted Apr 19, 1994·25 cites·11 claims
- 0841US5347547AMethod and apparatus for synchronizing transmitter and receiver for high speed data communicationADVANCED MICRO DEVICES INC·Filed 1992·Granted Sep 13, 1994·9 cites·11 claims
- 0938US6055241AArchitecture for a dual segment dual speed repeaterCYPRESS SEMICONDUCTOR CORP·Filed 1997·Granted Apr 25, 2000·10 cites·21 claims
- 1034US5731719APhase detector for a ternary signalCYPRESS SEMICONDUCTOR CORP·Filed 1995·Granted Mar 24, 1998·4 cites·20 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →