Inventor · disambiguated record
Yu Xu
Also filed as: XU YU · XU YU-HUAN
16 granted patents·1 pending application·230 citations·filing 2006–2019
94Inventor score
Top patents by PatentIndex Score
17 records- 0197US9960902B1Temporal change in data-crossing clock phase difference to resolve meta-stability in a clock and data recovery circuitXILINX INC·Filed 2016·Granted May 1, 2018·53 cites·20 claims
- 0294US9882703B1Resolving meta-stability in a clock and data recovery circuitXILINX INC·Filed 2016·Granted Jan 30, 2018·21 cites·20 claims
- 0394US9882795B1Signal loss detectorXILINX INC·Filed 2015·Granted Jan 30, 2018·17 cites·20 claims
- 0493US9209960B1Fast locking CDR for burst modeXILINX INC·Filed 2014·Granted Dec 8, 2015·27 cites·19 claims
- 0592US10742453B1Nonlinear equalizer with nonlinearity compensationXILINX INC·Filed 2019·Granted Aug 11, 2020·13 cites·20 claims
- 0692US9413524B1Dynamic gain clock data recovery in a receiverXILINX INC·Filed 2015·Granted Aug 9, 2016·13 cites·18 claims
- 0792US9379880B1Clock recovery circuitXILINX INC·Filed 2015·Granted Jun 28, 2016·13 cites·20 claims
- 0891US10256968B1Systems and methods for clock and data recoveryXILINX INC·Filed 2017·Granted Apr 9, 2019·10 cites·20 claims
- 0991US10038545B1Systems and methods for clock and data recoveryXILINX INC·Filed 2017·Granted Jul 31, 2018·9 cites·20 claims
- 1090US9356775B1Clock data recovery (CDR) phase walk scheme in a phase-interpolater-based transceiver systemXILINX INC·Filed 2015·Granted May 31, 2016·9 cites·20 claims
- 1188US8253451B1Clock data recovery using phase accumulation over a time period defined by a number of cycles of a clock signalHSIEH CHENG HSIANG·Filed 2010·Granted Aug 28, 2012·15 cites·18 claims
- 1285US7555667B1Programmable logic device integrated circuit with dynamic phase alignment capabilities and shared phase-locked-loop circuitryALTERA CORP·Filed 2006·Granted Jun 30, 2009·17 cites·20 claims
- 1384US10644844B1Circuit for and method of determining error spacing in an input signalXILINX INC·Filed 2017·Granted May 5, 2020·5 cites·18 claims
- 1482US10404408B1Pam multi-level error distribution signature captureXILINX INC·Filed 2016·Granted Sep 3, 2019·4 cites·14 claims
- 1556US9379720B1Clock recovery circuitXILINX INC·Filed 2015·Granted Jun 28, 2016·1 cites·17 claims
- 1654US7460040B1High-speed serial interface architecture for a programmable logic deviceALTERA CORP·Filed 2007·Granted Dec 2, 2008·3 cites·32 claims
- 1748US2011161963A1Methods, apparatuses, and computer program products for generating a cyclostationary extension for scheduling of periodic software tasksNOKIA CORP·Filed 2009·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →