Inventor · disambiguated record
Yves-Matthieu Le Vaillant
Also filed as: LE VAILLANT YVES-MATTHIEU
8 granted patents·3 pending applications·32 citations·filing 2004–2022
83Inventor score
Top patents by PatentIndex Score
11 records- 0187US7740735B2Tools and methods for disuniting semiconductor wafersSOITEC SILICON ON INSULATOR·Filed 2006·Granted Jun 22, 2010·11 cites·8 claims
- 0275US7439160B2Methods for producing a semiconductor entitySOITEC SILICON ON INSULATOR·Filed 2006·Granted Oct 21, 2008·6 cites·20 claims
- 0374US7981768B2Method for transferring an epitaxial layerSOITEC SILICON ON INSULATOR·Filed 2008·Granted Jul 19, 2011·5 cites·14 claims
- 0470US7465646B2Methods for fabricating a wafer structure having a strained silicon utility layerSOITEC SILICON ON INSULATOR·Filed 2005·Granted Dec 16, 2008·4 cites·13 claims
- 0567US7473620B2Process for adjusting the strain on the surface or inside a substrate made of a semiconductor materialSOITEC SILICON ON INSULATOR·Filed 2006·Granted Jan 6, 2009·3 cites·17 claims
- 0660US7887936B2Substrate with determinate thermal expansion coefficientSOITEC SILICON ON INSULATOR·Filed 2006·Granted Feb 15, 2011·2 cites·15 claims
- 0752US2025048939A1System for deforming an effective structureNELUMBO DIGITAL·Filed 2022·Application pending·0 cites
- 0844US2010167500A1Method of recycling an epitaxied donor waferS O TEC SILICON ON INSULATOR T·Filed 2010·Application pending·0 cites
- 0943US7176554B2Methods for producing a semiconductor entitySOITEC SILICON ON INSULATOR·Filed 2004·Granted Feb 13, 2007·1 cites·19 claims
- 1043US2011094668A1Substrate with determinate thermal expansion coefficientSOITEC SILICON ON INSULATOR·Filed 2011·Application pending·0 cites
- 1137US9240343B2Method for modifying an initial stress state of an active layer to a final stress stateSOITEC SILICON ON INSULATOR·Filed 2013·Granted Jan 19, 2016·0 cites·22 claims
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →