Inventor · disambiguated record
Zailong Bian
Also filed as: BIAN ZAILONG
21 granted patents·5 pending applications·67 citations·filing 2004–2021
93Inventor score
Top patents by PatentIndex Score
26 records- 0194US7439157B2Isolation trenches for memory devicesMICRON TECHNOLOGY INC·Filed 2005·Granted Oct 21, 2008·24 cites·85 claims
- 0291US9972628B1Conductive structures, wordlines and transistorsMICRON TECHNOLOGY INC·Filed 2016·Granted May 15, 2018·7 cites·19 claims
- 0389US9263459B1Capping poly channel pillars in stacked circuitsLI HONGQI·Filed 2014·Granted Feb 16, 2016·11 cites·18 claims
- 0486US7723227B1Methods of forming copper-comprising conductive lines in the fabrication of integrated circuitryMICRON TECHNOLOGY INC·Filed 2009·Granted May 25, 2010·12 cites·35 claims
- 0579US9577192B2Method for forming a metal cap in a semiconductor memory deviceSONY CORP·Filed 2014·Granted Feb 21, 2017·3 cites·20 claims
- 0678US11626481B2Semiconductor constructions, memory arrays, electronic systems, and methods of forming semiconductor constructionsMICRON TECHNOLOGY INC·Filed 2021·Granted Apr 11, 2023·0 cites·12 claims
- 0775US9929233B2Memory arraysMICRON TECHNOLOGY INC·Filed 2016·Granted Mar 27, 2018·1 cites·13 claims
- 0875US7968425B2Isolation regionsMICRON TECHNOLOGY INC·Filed 2006·Granted Jun 28, 2011·6 cites·49 claims
- 0973US11171205B2Semiconductor constructions, memory arrays, electronic systems, and methods of forming semiconductor constructionsMICRON TECHNOLOGY INC·Filed 2020·Granted Nov 9, 2021·0 cites·14 claims
- 1071US10147727B2Conductive structures, wordlines and transistorsMICRON TECHNOLOGY INC·Filed 2018·Granted Dec 4, 2018·1 cites·16 claims
- 1167US10622442B2Electronic systems and methods of forming semiconductor constructionsMICRON TECHNOLOGY INC·Filed 2018·Granted Apr 14, 2020·0 cites·17 claims
- 1264US7772672B2Semiconductor constructionsMICRON TECHNOLOGY INC·Filed 2005·Granted Aug 10, 2010·1 cites·31 claims
- 1363US10170545B2Memory arraysMICRON TECHNOLOGY INC·Filed 2018·Granted Jan 1, 2019·0 cites·19 claims
- 1461US9559163B2Memory arraysMICRON TECHNOLOGY INC·Filed 2014·Granted Jan 31, 2017·0 cites·26 claims
- 1560US8546888B2Isolation regionsBIAN ZAILONG·Filed 2011·Granted Oct 1, 2013·1 cites·23 claims
- 1652US9362495B2Confined resistance variable memory cells and methodsMICRON TECHNOLOGY INC·Filed 2013·Granted Jun 7, 2016·0 cites·14 claims
- 1752US8829643B2Memory arraysBIAN ZAILONG·Filed 2010·Granted Sep 9, 2014·0 cites·25 claims
- 1850US2014248767A1Methods Of Fabricating Integrated CircuitryMICRON TECHNOLOGY INC·Filed 2013·Application pending·0 cites
- 1949US2017133585A1Method for forming a metal cap in a semiconductor memory deviceSONY SEMICONDUCTOR SOLUTIONS CORP·Filed 2017·Application pending·0 cites
- 2048US10319678B2Capping poly channel pillars in stacked circuitsINTEL CORP·Filed 2015·Granted Jun 11, 2019·0 cites·18 claims
- 2148US9754879B2Integrated circuitryMICRON TECHNOLOGY INC·Filed 2016·Granted Sep 5, 2017·0 cites·9 claims
- 2248US2006246719A1Inter-metal dielectric fillMICRON TECHNOLOGY INC·Filed 2006·Application pending·0 cites
- 2347US2006265868A1Inter-metal dielectric fillRUEGER NEAL R·Filed 2006·Application pending·0 cites
- 2446US8597974B2Confined resistance variable memory cells and methodsBIAN ZAILONG·Filed 2010·Granted Dec 3, 2013·0 cites·18 claims
- 2544US8084355B2Methods of forming copper-comprising conductive lines in the fabrication of integrated circuitryBIAN ZAILONG·Filed 2010·Granted Dec 27, 2011·0 cites·38 claims
- 2640US2006038293A1Inter-metal dielectric fillRUEGER NEAL R·Filed 2004·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →