Inventor · disambiguated record
Zheng-Yong Liang
Also filed as: LIANG ZHENG · Liang zheng yong
7 granted patents·9 pending applications·5 citations·filing 2015–2025
74Inventor score
Files withTAIWAN SEMICONDUCTOR MFG CO LTD12UNIV LELAND STANFORD JUNIOR2NAT UNIV TSING HUA1UNIV NAT TSING HUA1
Top patents by PatentIndex Score
16 records- 0190US11942358B2Low thermal budget dielectric for semiconductor devicesTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2021·Granted Mar 26, 2024·2 cites·20 claims
- 0286US11145851B2Composite lithium metal anodes for lithium batteries with reduced volumetric fluctuation during cycling and dendrite suppressionUNIV LELAND STANFORD JUNIOR·Filed 2016·Granted Oct 12, 2021·3 cites·14 claims
- 0378US2025366140A1Semiconductor device structure and methods of forming the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2025·Application pending·0 cites
- 0473US11757086B2Composite lithium metal anodes for lithium batteries with reduced volumetric fluctuation during cycling and dendrite suppressionUNIV LELAND STANFORD JUNIOR·Filed 2021·Granted Sep 12, 2023·0 cites·11 claims
- 0573US2025299996A1Debonding structures for wafer bondingTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2025·Application pending·0 cites
- 0671US12489082B2Metal nanoparticles in an amorphous bonding layer between a device substrate and carrier substrateTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2024·Granted Dec 2, 2025·0 cites·20 claims
- 0770US12347717B2Debonding structures for wafer bondingTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2022·Granted Jul 1, 2025·0 cites·20 claims
- 0868US12512439B2Wafer bonding method and semiconductor structure obtained by the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2022·Granted Dec 30, 2025·0 cites·20 claims
- 0968US2025126870A1Semiconductor device structure and methods of forming the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2023·Application pending·0 cites
- 1058US2025253287A1Low temperature substrate bonding methodTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2024·Application pending·0 cites
- 1156US2025318234A1Semiconductor device and formation method thereofTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2024·Application pending·0 cites
- 1256US2025014943A1Surface Profile Control Of Passivation Layers In Integrated Circuit ChipsTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2023·Application pending·0 cites
- 1355US2025006687A1Heat dissipation in semiconductor devicesTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2023·Application pending·0 cites
- 1454US2024355805A1Method of forming semiconductor structureTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2023·Application pending·0 cites
- 1544US10522361B2Atomic layer deposition methodUNIV NAT TSING HUA·Filed 2018·Granted Dec 31, 2019·0 cites·12 claims
- 1630US2017025360A1Semiconductor interconnect structure and manufacturing method thereofNAT UNIV TSING HUA·Filed 2015·Application pending·0 cites
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Identity basis: PatentsView inventor disambiguation (2025Q4-odp release). How scoring works →