Inventor · name-matched record
CHAO HUANG-LIN
7 granted patents·5 pending applications·0 citations·filing 2019–2025
70Inventor score
This identity is grouped by exact name match (no disambiguated inventor record was available for these filings) — it may combine same-named inventors.
Top patents by PatentIndex Score
12 records- 0184US12543365B2Fin isolation structure for FinFET and method of forming the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2024·Granted Feb 3, 2026·0 cites·20 claims
- 0282US2026075882A1Method for forming transistor and semiconductor device with multiple threshold voltagesTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2025·Application pending·0 cites
- 0382US2026101538A1Semiconductor devices and methods of manufacturing thereofTAIWAN SEMICONDUCTOR MFG COMPANY LTD·Filed 2025·Application pending·0 cites
- 0481US2026101684A1Wafer bonding method and semiconductor structure manufactured using the sameTAIWAN SEMICONDUCTOR MFG COMPANY LTD·Filed 2025·Application pending·0 cites
- 0575US12538791B2Source/drain contact for semiconductor device structureTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2023·Granted Jan 27, 2026·0 cites·20 claims
- 0673US12520532B2Semiconductor devices and methods of manufacturing thereofTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2023·Granted Jan 6, 2026·0 cites·20 claims
- 0764US12588234B2Semiconductor devices with implanted STI regions and methods of forming the sameTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2023·Granted Mar 24, 2026·0 cites·20 claims
- 0862US2026026026A1Semiconductor device and manufacturing method thereofTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2024·Application pending·0 cites
- 0960US2026068557A1Method for manufacturing semiconductor device with reduced interfacial layer thicknessTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2024·Application pending·0 cites
- 1059US12557368B2High-K dielectric materials with dipole layerTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2021·Granted Feb 17, 2026·0 cites·19 claims
- 1153US12568775B2Method for forming a memory device at a backside of a wafer substrate, and memory cell including a memory device at a backside of a wafer substrateTAIWAN SEMICONDUCTOR MFG CO LTD·Filed 2022·Granted Mar 3, 2026·0 cites·20 claims
- 1249US12538739B2Post CMP cleaning apparatus and post CMP cleaning methodsWU CHEN HAO·Filed 2019·Granted Jan 27, 2026·0 cites·20 claims
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Identity basis: exact name match across USPTO filings. How scoring works →