Inventor · name-matched record
ELSHERBINI ADEL A
6 granted patents·9 pending applications·1 citations·filing 2021–2025
65Inventor score
This identity is grouped by exact name match (no disambiguated inventor record was available for these filings) — it may combine same-named inventors.
Top patents by PatentIndex Score
15 records- 0196US2026026376A1Microelectronic assemblies with communication networksINTEL CORP·Filed 2025·Application pending·0 cites
- 0286US12519084B2Forwarded supply voltage for dynamic voltage and frequency scaling with stacked chip packaging architectureINTEL CORP·Filed 2022·Granted Jan 6, 2026·1 cites·20 claims
- 0362US2026096472A1Extended hybrid bonding with a photonic interfaceINTEL CORP·Filed 2024·Application pending·0 cites
- 0462US2026099012A1Hybrid-bonded ic die having topographic surface featuresINTEL CORP·Filed 2024·Application pending·0 cites
- 0561US2026090360A1Split processing of integrated circuit layers with high accuracy bondingINTEL CORP·Filed 2024·Application pending·0 cites
- 0661US2026093070A1Multi-layer integrated ring resonators and waveguide interconnect stacksINTEL CORP·Filed 2024·Application pending·0 cites
- 0761US2026090452A1Integrated circuit packages including a high thermal conductivity material coupled to a substrate with microchannels in 3 dimensional die stacksINTEL CORP·Filed 2024·Application pending·0 cites
- 0861US2026090450A1Integrated circuit packages including a high thermal conductivity material in 3 dimensional die stacksINTEL CORP·Filed 2024·Application pending·0 cites
- 0960US2026090453A1Integrated circuit packages including a structural die coupled to a high thermal conductivity material in 3 dimensional die stacksINTEL CORP·Filed 2024·Application pending·0 cites
- 1059US12538841B2Quasi-monolithic die architecturesINTEL CORP·Filed 2022·Granted Jan 27, 2026·0 cites·20 claims
- 1158US12581938B2Package architecture for quasi-monolithic chip with backside powerINTEL CORP·Filed 2022·Granted Mar 17, 2026·0 cites·15 claims
- 1258US12581968B2Package architecture of large dies using quasi-monolithic chip layersINTEL CORP·Filed 2022·Granted Mar 17, 2026·0 cites·20 claims
- 1355US12599033B2Quasi-monolithic integrated packaging architecture with mid-die serializer/deserializerINTEL CORP·Filed 2021·Granted Apr 7, 2026·0 cites·20 claims
- 1455US12550781B2Template structure for quasi-monolithic die architecturesINTEL CORP·Filed 2022·Granted Feb 10, 2026·0 cites·20 claims
- 1542US2026005651A1Resonant clocking architectureINTEL CORPOATION·Filed 2024·Application pending·0 cites
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Identity basis: exact name match across USPTO filings. How scoring works →