Inventor · name-matched record
OH TAEYOUNG
6 granted patents·4 pending applications·0 citations·filing 2023–2025
64Inventor score
Files withSAMSUNG ELECTRONICS CO LTD10
This identity is grouped by exact name match (no disambiguated inventor record was available for these filings) — it may combine same-named inventors.
Top patents by PatentIndex Score
10 records- 0185US2026038550A1Semiconductor devices capable of performing write training without read training, and memory system including the sameSAMSUNG ELECTRONICS CO LTD·Filed 2025·Application pending·0 cites
- 0283US2026037177A1Method and semiconductor memory device having memory cell array including sub-array blocksSAMSUNG ELECTRONICS CO LTD·Filed 2025·Application pending·0 cites
- 0378US2026044288A1Memory module for performing one-time programmable (opt) addressing operation to store unique id of each memory device in an storge region of each memory device, and storage device including the sameSAMSUNG ELECTRONICS CO LTD·Filed 2025·Application pending·0 cites
- 0475US12535956B2Semiconductor memory device and memory system including the sameSAMSUNG ELECTRONICS CO LTD·Filed 2024·Granted Jan 27, 2026·0 cites·20 claims
- 0575US12535960B2Semiconductor memory devices and memory systems including the sameSAMSUNG ELECTRONICS CO LTD·Filed 2024·Granted Jan 27, 2026·0 cites·20 claims
- 0671US2026038572A1Memory device, operation method of a memory device, and operation method of a memory controllerSAMSUNG ELECTRONICS CO LTD·Filed 2025·Application pending·0 cites
- 0764US12572456B2Memory module including memory devices to which unit ID is assigned and storage device including the sameSAMSUNG ELECTRONICS CO LTD·Filed 2024·Granted Mar 10, 2026·0 cites·18 claims
- 0859US12542166B2Memory device and method for synchronizing command start point (CSP)SAMSUNG ELECTRONICS CO LTD·Filed 2023·Granted Feb 3, 2026·0 cites·20 claims
- 0956US12531106B2Memory module adjusting inter-rank clock timing, memory system and training method thereofSAMSUNG ELECTRONICS CO LTD·Filed 2023·Granted Jan 20, 2026·0 cites·20 claims
- 1053US12531111B2Semiconductor package including memory die stack having clock signal shared by lower and upper bytesSAMSUNG ELECTRONICS CO LTD·Filed 2023·Granted Jan 20, 2026·0 cites·19 claims
Join the waitlist — get patent alerts
Get an alert when OH TAEYOUNG files or is granted a new patent.
We store only your email — no account needed. See our privacy policy.
Identity basis: exact name match across USPTO filings. How scoring works →