Inventor · name-matched record
SUNG MIN GYU
12 granted patents·10 pending applications·0 citations·filing 2022–2024
79Inventor score
Files withIBM22
This identity is grouped by exact name match (no disambiguated inventor record was available for these filings) — it may combine same-named inventors.
Top patents by PatentIndex Score
22 records- 0168US12557356B2Semiconductor structure with fully wrapped-around backside contactIBM·Filed 2022·Granted Feb 17, 2026·0 cites·20 claims
- 0268US12557295B2Embedded ReRAM with backside contactIBM·Filed 2022·Granted Feb 17, 2026·0 cites·19 claims
- 0367US12550376B2Work function metal patterning and middle-of-line self-aligned contacts for nanosheet technologyIBM·Filed 2023·Granted Feb 10, 2026·0 cites·20 claims
- 0465US12588273B2Stacked electronic devices having independent gatesIBM·Filed 2023·Granted Mar 24, 2026·0 cites·20 claims
- 0565US12557354B2Vertical field-effect transistor (FET) stacked over horizontal FETIBM·Filed 2022·Granted Feb 17, 2026·0 cites·10 claims
- 0664US12557338B2Semiconductor structure having a backside contact with backside sidewall spacersIBM·Filed 2022·Granted Feb 17, 2026·0 cites·20 claims
- 0763US12593457B2Multi-state ferroelectric-RAM with stacked capacitorsIBM·Filed 2022·Granted Mar 31, 2026·0 cites·16 claims
- 0863US12563747B2Three dimensional ReRAM deviceIBM·Filed 2022·Granted Feb 24, 2026·0 cites·9 claims
- 0963US2026090015A1Self aligned backside contactIBM·Filed 2024·Application pending·0 cites
- 1063US2026082630A1Self aligned backside channel removalIBM·Filed 2024·Application pending·0 cites
- 1163US2026068222A1Backside contact without rx linerIBM·Filed 2024·Application pending·0 cites
- 1263US2026026038A1Isolation of epitaxial source/drain regionsIBM·Filed 2024·Application pending·0 cites
- 1362US12550427B2Vertical inverter formation on stacked field effect transistor (SFET)IBM·Filed 2022·Granted Feb 10, 2026·0 cites·20 claims
- 1462US2026052751A1Forming shared source/drain contact with a gate-cut structureIBM·Filed 2024·Application pending·0 cites
- 1562US2026026040A1Dual silicide shared source/drain contactIBM·Filed 2024·Application pending·0 cites
- 1662US2026059843A1Removing high-k layer from inner spacerIBM·Filed 2024·Application pending·0 cites
- 1762US2026032998A1Flexible active region for stacked fetsIBM·Filed 2024·Application pending·0 cites
- 1862US2026075876A1Nanosheet device backside connecting to both vdd and vss at the same levelIBM·Filed 2024·Application pending·0 cites
- 1961US12593468B2Self-aligned backside contact with increased contact areaIBM·Filed 2022·Granted Mar 31, 2026·0 cites·20 claims
- 2061US2026068299A1Contact configurations for forksheet devicesIBM·Filed 2024·Application pending·0 cites
- 2159US12568683B2Single stack dual channel gate-all-around nanosheet with strained PFET and bottom dielectric isolation NFETIBM·Filed 2022·Granted Mar 3, 2026·0 cites·17 claims
- 2256US12575160B2Backside and frontside contacts for semiconductor deviceIBM·Filed 2022·Granted Mar 10, 2026·0 cites·20 claims
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Identity basis: exact name match across USPTO filings. How scoring works →