Inventor · name-matched record
TRAN HIEU VAN
8 granted patents·6 pending applications·0 citations·filing 2021–2025
73Inventor score
Files withSILICON STORAGE TECH INC14
This identity is grouped by exact name match (no disambiguated inventor record was available for these filings) — it may combine same-named inventors.
Top patents by PatentIndex Score
14 records- 0183US2026031112A1Bitline regulation circuitSILICON STORAGE TECH INC·Filed 2025·Application pending·0 cites
- 0283US2026094629A1Memory cell array comprising sensing bitline metal layer and current-carrying metal layerSILICON STORAGE TECH INC·Filed 2025·Application pending·0 cites
- 0379US12541679B2Method of scanning an image using non-volatile memory array neural network classifierSILICON STORAGE TECH INC·Filed 2023·Granted Feb 3, 2026·0 cites·17 claims
- 0479US12518829B2Adaptive bias decoder for non-volatile memory systemSILICON STORAGE TECH INC·Filed 2023·Granted Jan 6, 2026·0 cites·6 claims
- 0575US12566569B2Array of non-volatile memory cells to store data in analog form and digital formSILICON STORAGE TECH INC·Filed 2024·Granted Mar 3, 2026·0 cites·14 claims
- 0668US12573452B2Determination of a bias voltage to apply to one or more memory cellsSILICON STORAGE TECH INC·Filed 2023·Granted Mar 10, 2026·0 cites·12 claims
- 0768US2026031119A1Output block for array of non-volatile memory cellsSILICON STORAGE TECH INC·Filed 2025·Application pending·0 cites
- 0856US12574048B2Sigma-delta analog-to-digital converter to generate digital output from vector-by-matrix multiplication arraySILICON STORAGE TECH INC·Filed 2024·Granted Mar 10, 2026·0 cites·13 claims
- 0956US2026065984A1Weight scaling for neural networkSILICON STORAGE TECH INC·Filed 2024·Application pending·0 cites
- 1053US12579422B2Input circuitry for analog neural memory in a deep learning artificial neural networkSILICON STORAGE TECH INC·Filed 2021·Granted Mar 17, 2026·0 cites·7 claims
- 1153US12535966B2System and method for implementing temperature compensation in a memory deviceSILICON STORAGE TECH INC·Filed 2023·Granted Jan 27, 2026·0 cites·20 claims
- 1253US2026066001A1Configurable input and output blocks for vector-by-matrix multiplication arraySILICON STORAGE TECH INC·Filed 2024·Application pending·0 cites
- 1352US2026094648A1Erase operation for non-volatile memory cellSILICON STORAGE TECH INC·Filed 2025·Application pending·0 cites
- 1450US12530561B2Artificial neural network comprising an analog array and a digital arraySILICON STORAGE TECH INC·Filed 2022·Granted Jan 20, 2026·0 cites·7 claims
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Identity basis: exact name match across USPTO filings. How scoring works →