Pixel, organic light emitting display device including the pixel, and method of driving the pixel

Abstract

A pixel includes a driving transistor including a gate connected to a first node, a first electrode connected to a second node, and a second electrode connected to an OLED, a first transistor configured to receive a first emission control signal and connected between a first power source and the second node, a second transistor configured to receive a scan signal and connected between the first and second nodes, a third transistor configured to receive the scan signal and including a first electrode configured to receive a data voltage, and a second electrode connected to a third node, a fourth transistor configured to receive a second emission control signal and connected between the third node and the OLED, a fifth transistor configured to receive the scan signal and connected between the OLED and an initializing power source, and a storage capacitor connected between the first node and the third node.

What is claimed is: 
     
       1. A pixel comprising:
 an organic light emitting diode comprising an anode electrode, and a cathode electrode configured to receive a second power source; and 
 a driving circuit configured to supply a current to the organic light emitting diode, the driving circuit comprising:
 a driving transistor comprising a gate electrode electrically connected to a first node, a first electrode electrically connected to a second node, and a second electrode electrically connected to the anode electrode of the organic light emitting diode; 
 a first transistor directly coupled between the driving transistor and a first power source, configured to supply the first power source to the second node, and comprising a gate electrode configured to receive a first emission control signal, a first electrode configured to receive the first power source, and a second electrode electrically connected to the second node; 
 a second transistor comprising a gate electrode configured to receive a scan signal, a first electrode electrically connected to the second node, and a second electrode electrically connected to the first node; 
 a third transistor comprising a gate electrode configured to receive the scan signal, a first electrode configured to receive a data voltage, and a second electrode electrically connected to a third node; 
 a fourth transistor comprising a gate electrode configured to receive a second emission control signal that is different from the first emission control signal, a first electrode electrically connected to the third node, and a second electrode electrically connected to the anode electrode of the organic light emitting diode; 
 a fifth transistor comprising a gate electrode configured to receive the scan signal, a first electrode electrically connected to the anode electrode of the organic light emitting diode, and a second electrode configured to receive an initializing power source; and 
 a storage capacitor electrically connected between the first node and the third node. 
 
 
     
     
       2. The pixel of  claim 1 , wherein the driving transistor, and the first, second, third, fourth, and fifth transistors comprise n-channel type transistors. 
     
     
       3. The pixel of  claim 1 , wherein a length of the first emission control signal is substantially equal to a length of the second emission control signal in a frame period,
 wherein the frame period comprises first to seventh periods, 
 wherein the first emission control signal has a high level in the first, second, third, and seventh periods, and has a low level in the fourth, fifth, and sixth periods, 
 wherein the second emission control signal has a high level in the first, sixth, and seventh periods, and has a low level in the second, third, fourth, and fifth periods, 
 wherein the scan signal has a high level in the third and fourth periods, and has a low level in the first, second, fifth, sixth, and seventh periods, and 
 wherein the organic light emitting diode is configured to emit light in the first, second, and seventh periods. 
 
     
     
       4. The pixel of  claim 3 , wherein the first, second, third, and fifth transistors are configured to be turned on, and the fourth transistor is configured to be turned off, in the third period, and
 wherein the first node is configured to receive the first power source in the third period. 
 
     
     
       5. The pixel of  claim 3 , wherein the second, third, and fifth transistors are configured to be turned on, and the first and fourth transistors are configured to be turned off, in the fourth period,
 wherein the first node and the second node are configured to be electrically connected so that the driving transistor is diode-connected in the fourth period, and 
 wherein a difference in a voltage level between ends of the storage capacitor corresponds to following EQUATION:
     Vstg =( V init+ Vth )− V data
 
 
 wherein Vstg represents the difference in the voltage level between the ends of the storage capacitor, Vinit represents a voltage level of the initializing power source, Vth represents a threshold voltage of the driving transistor, and Vdata represents a level of the data voltage. 
 
     
     
       6. The pixel of  claim 3 , wherein the first and fourth transistors are configured to be turned on, and the second, third, and fifth transistors are configured to be turned off, in the seventh period,
 wherein the third node and the anode electrode of the organic light emitting diode are configured to be electrically connected in the seventh period, and 
 wherein a level of a current that flows between the first electrode and the second electrode of the driving transistor corresponds to following EQUATION:
     Ids=k ( Vgs−Vth ) 2   =k {( V init+ Vth )− V data− Vth}   2   =k ( V init− V data) 2  
 
 
 wherein Ids represents the level of the current that flows between the first electrode and the second electrode of the driving transistor, k represents a proportional constant, Vgs represents a difference in voltage level between the gate electrode and the second electrode of the driving transistor, Vinit represents a voltage level of the initializing power source, Vth represents a threshold voltage of the driving transistor, and Vdata represents a level of the data voltage. 
 
     
     
       7. An organic light emitting display device comprising:
 a display panel; and 
 a display panel driver configured to drive the display panel, the display panel comprising:
 pixels; 
 m (m is a natural number greater than 1) scan lines configured to transmit scan signals to the pixels; 
 (m+1) emission control lines configured to transmit emission control signals to the pixels; and 
 n (n is a natural number) data lines configured to transmit data voltages to the pixels, 
 wherein the display panel driver comprises: 
 a data driver configured to generate the data voltages based on received image signals; and 
 a signal driver configured to generate the scan signals and the emission control signals, 
 wherein a pixel of the pixels that is at an ith (i is a natural number less than or equal to m) row comprises:
 an organic light emitting diode comprising an anode electrode, and a cathode electrode configured to receive a second power source; 
 a driving transistor comprising a gate electrode electrically connected to a first node, a first electrode electrically connected to a second node, and a second electrode electrically connected to the anode electrode of the organic light emitting diode; 
 a first transistor directly coupled between the driving transistor and a first power source, configured to supply the first power source to the second node, and comprising a gate electrode configured to receive a first emission control signal, a first electrode configured to receive the first power source, and a second electrode electrically connected to the second node; 
 a second transistor comprising a gate electrode configured to receive a scan signal, a first electrode electrically connected to the second node, and a second electrode electrically connected to the first node; 
 a third transistor comprising a gate electrode configured to receive the scan signal, a first electrode configured to receive a data voltage, and a second electrode electrically connected to a third node; 
 a fourth transistor comprising a gate electrode configured to receive a second emission control signal that is different from the first emission control signal, a first electrode electrically connected to the third node, and a second electrode electrically connected to the anode electrode of the organic light emitting diode; 
 a fifth transistor comprising a gate electrode configured to receive the scan signal, a first electrode electrically connected to the anode electrode of the organic light emitting diode, and a second electrode configured to receive an initializing power source; and 
 a storage capacitor electrically connected between the first node and the third node. 
 
 
 
     
     
       8. The organic light emitting display device of  claim 7 , wherein a frame period comprises first to seventh periods,
 wherein an ith emission control signal has a high level in the first, second, third, and seventh periods, and has a low level in the fourth, fifth, and sixth periods, 
 wherein an (i−1)th emission control signal has a high level in the first, sixth, and seventh periods, and has a low level in the second, third, fourth, and fifth periods, 
 wherein an ith scan signal has a high level in the third and fourth periods and has a low level in the first, second, fifth, sixth, and seventh periods, and 
 wherein the organic light emitting diode is configured to emit light only in the first, second, and seventh periods. 
 
     
     
       9. The organic light emitting display device of  claim 8 , wherein the second, third, and fifth transistors are configured to be turned on, and the first and fourth transistors are configured to be turned off, in the fourth period,
 wherein the first node and the second node are configured to be electrically connected so that the driving transistor is diode-connected in the fourth period, and 
 wherein a difference in a voltage level between ends of the storage capacitor corresponds to following EQUATION:
     Vstg =( V init+ Vth )− V data
 
 
 wherein Vstg represents the difference in the voltage level between the ends of the storage capacitor, Vinit represents a voltage level of the initializing power source, Vth represents a threshold voltage of the driving transistor, and Vdata represents a level of the data voltage. 
 
     
     
       10. The organic light emitting display device of  claim 8 , wherein the first and fourth transistors are configured to be turned on, and the second, third, and fifth transistors are configured to be turned off, in the seventh period,
 wherein the third node and the anode electrode of the organic light emitting diode are configured to be electrically connected in the seventh period, and 
 wherein a level of a current that flows between the first electrode and the second electrode of the driving transistor corresponds to following EQUATION:
     Ids=k ( Vgs−Vth ) 2   =k {( V init+ Vth )− V data− Vth}   2   =k ( V init− V data) 2  
 
 
 wherein Ids represents the level of the current that flows between the first electrode and the second electrode of the driving transistor, k represents a proportional constant, Vgs represents a difference in voltage level between the gate electrode and the second electrode of the driving transistor, Vinit represents a voltage level of the initializing power source, Vth represents a threshold voltage of the driving transistor, and Vdata represents a level of the data voltage. 
 
     
     
       11. The organic light emitting display device of  claim 7 , further comprising a power source supplier configured to generate the first power source and the initializing power source,
 wherein the display panel further comprises first power source lines configured to transmit the first power source to the pixels, and initializing power source lines configured to transmit the initializing power source to the pixels, 
 wherein the pixels are arranged in a first direction, and in a second direction that intersects the first direction, 
 wherein lengths of the emission control signals are substantially constant in a frame period, 
 wherein the scan lines and the emission control lines extend in the first direction, 
 wherein the scan signals or the emission control signals are sequentially supplied in the second direction in the frame period, and 
 wherein the first power source lines and the initializing power source lines extend in the second direction. 
 
     
     
       12. The organic light emitting display device of  claim 11 , wherein a first electrode of the first transistor is electrically connected to one of the first power source lines, and
 wherein a pixel adjacent the pixel in the ith row in the first direction is configured to receive the first power source through the first transistor of the pixel in the ith row. 
 
     
     
       13. The organic light emitting display device of  claim 11 , wherein an initializing power source line configured to supply the initializing power source to the pixel in the ith row is configured to supply the initializing power source to a pixel adjacent the pixel in the ith row in a direction opposite to the first direction. 
     
     
       14. The organic light emitting display device of  claim 11 , wherein a structure of the pixel in the ith row is substantially equal to a structure of a pixel adjacent the pixel in the ith row in the second direction, and
 wherein an emission control line of the emission control lines is configured to supply an ith emission control signal to the gate electrode of the first transistor of the pixel in the ith row, and is configured to supply the ith emission control signal to a gate electrode of a fourth transistor of the pixel adjacent the pixel in the ith row in the second direction. 
 
     
     
       15. A method of driving a pixel comprising:
 an organic light emitting diode comprising an anode electrode, and a cathode electrode configured to receive a second power source; and 
 a driving transistor comprising a gate electrode electrically connected to a first node, a first electrode electrically connected to a second node, and a second electrode electrically connected to the anode electrode of the organic light emitting diode; 
 a first transistor comprising a gate electrode configured to receive a first emission control signal, a first electrode configured to receive a first power source, and a second electrode electrically connected to the second node, the first transistor being directly coupled between the driving transistor and the first power source; 
 a second transistor comprising a gate electrode configured to receive a scan signal, a first electrode electrically connected to the second node, and a second electrode electrically connected to the first node; 
 a third transistor comprising a gate electrode configured to receive the scan signal, a first electrode configured to receive a data voltage, and a second electrode electrically connected to a third node; 
 a fourth transistor comprising a gate electrode configured to receive a second emission control signal that is different from the first emission control signal, a first electrode electrically connected to the third node, and a second electrode electrically connected to the anode electrode of the organic light emitting diode; 
 a fifth transistor comprising a gate electrode configured to receive the scan signal, a first electrode electrically connected to the anode electrode of the organic light emitting diode, and a second electrode configured to receive an initializing power source; and 
 a storage capacitor electrically connected between the first node and the third node, 
 wherein the method comprises:
 supplying the scan signal and the first emission control signal to supply the first power source to the first node; 
 supplying the scan signal to diode-connect the driving transistor, and not supplying the first emission control signal to block the first power source from the driving transistor; and 
 supplying the first emission control signal and the second emission control signal so that the organic light emitting diode emits light. 
 
 
     
     
       16. The method of  claim 15 , wherein a length of the first emission control signal is substantially equal to a length of the second emission control signal in a frame period, and
 wherein a time at which the first emission control signal starts to be supplied is later than a time at which the second emission control signal starts to be supplied in the frame period. 
 
     
     
       17. The method of  claim 15 , wherein the supplying the scan signal to diode-connect the driving transistor, and not supplying the first emission control signal to block the first power source from the driving transistor, comprise:
 turning on the second, third, and fifth transistors; 
 turning off the first and fourth transistors; and 
 electrically connecting the first node and the second node, and 
 wherein a difference in voltage level between ends of the storage capacitor corresponds to following EQUATION:
     Vstg =( V init+ Vth )− V data
 
 
 wherein Vstg represents the difference in voltage level between the ends of the storage capacitor, Vinit represents a voltage level of the initializing power source, Vth represents a threshold voltage of the driving transistor, and Vdata represents a level of the data voltage. 
 
     
     
       18. The method of  claim 15 , wherein the supplying the first emission control signal and the second emission control signal so that the organic light emitting diode emits light comprises:
 turning on the first and fourth transistors; 
 turning off the second, third, and fifth transistors; and 
 electrically connecting the third node and the anode electrode of the organic light emitting diode, 
 wherein a level of a current that flows between the first electrode and the second electrode of the driving transistor corresponds to following EQUATION:
     Ids=k ( Vgs−Vth ) 2   =k {( V init+ Vth )− V data− Vth}   2   =k ( V init− V data) 2  
 
 
 wherein Ids represents the level of the current that flows between the first electrode and the second electrode of the driving transistor, k represents a proportional constant, Vgs represents a difference in voltage level between the gate electrode and the second electrode of the driving transistor, Vinit represents a voltage level of the initializing power source, Vth represents a threshold voltage of the driving transistor, and Vdata represents a level of the data voltage.